Author: mmel
Date: Sun Sep 27 09:14:16 2020
New Revision: 366193
URL: https://svnweb.freebsd.org/changeset/base/366193
Log:
Don't map same physical memory multiple times with different cache
attributes.
This is explicitly stated as architectural undefined behavior, leadint to
coherencz issues sonner or later.
Modified:
head/sys/arm64/arm64/locore.S
Modified: head/sys/arm64/arm64/locore.S
==============================================================================
--- head/sys/arm64/arm64/locore.S Sun Sep 27 09:12:36 2020
(r366192)
+++ head/sys/arm64/arm64/locore.S Sun Sep 27 09:14:16 2020
(r366193)
@@ -498,7 +498,7 @@ common:
cbz x19, 1f
/* Create the identity mapping for FDT data (2 MiB max) */
- mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_UNCACHEABLE))
+ mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK))
mov x9, x0
mov x8, x0 /* VA start (== PA start) */
mov x10, #1
@@ -508,7 +508,7 @@ common:
#endif
/* Create the VA = PA map */
- mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_UNCACHEABLE))
+ mov x7, #(ATTR_S1_nG | ATTR_S1_IDX(VM_MEMATTR_WRITE_BACK))
mov x9, x27
mov x8, x9 /* VA start (== PA start) */
mov x10, #1
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