Author: adrian
Date: Tue Oct 25 23:17:53 2011
New Revision: 226762
URL: http://svn.freebsd.org/changeset/base/226762

Log:
  Correct/complete a partially-disabled TX interrupt mitigation configuration.
  
  Although a previous commit disabled TX interrupt mitigation handling and
  configuration, the mask register bits weren't setup correctly.

Modified:
  head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c

Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c      Tue Oct 25 23:14:40 
2011        (r226761)
+++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c      Tue Oct 25 23:17:53 
2011        (r226762)
@@ -358,12 +358,12 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO
         */
        OS_REG_WRITE(ah, AR_OBS, 8);
 
-#ifdef AH_AR5416_INTERRUPT_MITIGATION
        /*
         * Disable the "general" TX/RX mitigation timers.
         */
        OS_REG_WRITE(ah, AR_MIRT, 0);
 
+#ifdef AH_AR5416_INTERRUPT_MITIGATION
        /*
         * This initialises the RX interrupt mitigation timers.
         *
@@ -631,11 +631,11 @@ ar5416InitIMR(struct ath_hal *ah, HAL_OP
                         | AR_IMR_BCNMISC;
 
 #ifdef AH_AR5416_INTERRUPT_MITIGATION
-       ahp->ah_maskReg |= AR_IMR_TXINTM | AR_IMR_RXINTM
-                       |  AR_IMR_TXMINTR | AR_IMR_RXMINTR;
+       ahp->ah_maskReg |= AR_IMR_RXINTM | AR_IMR_RXMINTR;
 #else
-       ahp->ah_maskReg |= AR_IMR_TXOK | AR_IMR_RXOK;
+       ahp->ah_maskReg |= AR_IMR_RXOK;
 #endif 
+       ahp->ah_maskReg |= AR_IMR_TXOK;
 
        if (opmode == HAL_M_HOSTAP)
                ahp->ah_maskReg |= AR_IMR_MIB;
_______________________________________________
[email protected] mailing list
http://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "[email protected]"

Reply via email to