Author: jhb
Date: Fri Jul 6 14:28:18 2012
New Revision: 238167
URL: http://svn.freebsd.org/changeset/base/238167
Log:
Add support for the 'invept' and 'invvpid' instructions. Beyond simply
adding appropriate table entries, the assembler had to be adjusted as
these are the first non-SSE instructions to use a 3-byte opcode (and a
mandatory prefix to boot).
MFC after: 1 month
Modified:
head/contrib/binutils/gas/config/tc-i386.c
head/contrib/binutils/opcodes/i386-dis.c
head/contrib/binutils/opcodes/i386-opc.tbl
head/contrib/binutils/opcodes/i386-tbl.h
Modified: head/contrib/binutils/gas/config/tc-i386.c
==============================================================================
--- head/contrib/binutils/gas/config/tc-i386.c Fri Jul 6 14:25:59 2012
(r238166)
+++ head/contrib/binutils/gas/config/tc-i386.c Fri Jul 6 14:28:18 2012
(r238167)
@@ -3990,6 +3990,16 @@ output_insn (void)
goto check_prefix;
}
}
+ else if (i.tm.base_opcode == 0x660f3880 || i.tm.base_opcode ==
0x660f3881)
+ {
+ /* invept and invvpid are 3 byte instructions with a
+ mandatory prefix. */
+ if (i.tm.base_opcode & 0xff000000)
+ {
+ prefix = (i.tm.base_opcode >> 24) & 0xff;
+ add_prefix (prefix);
+ }
+ }
else if ((i.tm.base_opcode & 0xff0000) != 0)
{
prefix = (i.tm.base_opcode >> 16) & 0xff;
@@ -4029,6 +4039,12 @@ output_insn (void)
p = frag_more (3);
*p++ = (i.tm.base_opcode >> 16) & 0xff;
}
+ else if (i.tm.base_opcode == 0x660f3880 ||
+ i.tm.base_opcode == 0x660f3881)
+ {
+ p = frag_more (3);
+ *p++ = (i.tm.base_opcode >> 16) & 0xff;
+ }
else
p = frag_more (2);
Modified: head/contrib/binutils/opcodes/i386-dis.c
==============================================================================
--- head/contrib/binutils/opcodes/i386-dis.c Fri Jul 6 14:25:59 2012
(r238166)
+++ head/contrib/binutils/opcodes/i386-dis.c Fri Jul 6 14:28:18 2012
(r238167)
@@ -213,6 +213,7 @@ fetch_data (struct disassemble_info *inf
#define Ew { OP_E, w_mode }
#define M { OP_M, 0 } /* lea, lgdt, etc. */
#define Ma { OP_M, v_mode }
+#define Mo { OP_M, o_mode }
#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS,
LES etc */
#define Mq { OP_M, q_mode }
#define Gb { OP_G, b_mode }
@@ -540,6 +541,8 @@ fetch_data (struct disassemble_info *inf
#define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
#define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
+#define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } }
+#define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } }
#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
@@ -2586,6 +2589,22 @@ static const struct dis386 prefix_user_t
{ "punpckldq",{ MX, EMq } },
{ "(bad)", { XX } },
},
+
+ /* PREGRP98 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "invept", { Gm, Mo } },
+ { "(bad)", { XX } },
+ },
+
+ /* PREGRP99 */
+ {
+ { "(bad)", { XX } },
+ { "(bad)", { XX } },
+ { "invvpid",{ Gm, Mo } },
+ { "(bad)", { XX } },
+ },
};
static const struct dis386 x86_64_table[][2] = {
@@ -2755,8 +2774,8 @@ static const struct dis386 three_byte_ta
{ "(bad)", { XX } },
{ "(bad)", { XX } },
/* 80 */
- { "(bad)", { XX } },
- { "(bad)", { XX } },
+ { PREGRP98 },
+ { PREGRP99 },
{ "(bad)", { XX } },
{ "(bad)", { XX } },
{ "(bad)", { XX } },
@@ -5884,7 +5903,7 @@ static void
OP_M (int bytemode, int sizeflag)
{
if (modrm.mod == 3)
- /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
+ /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst,invept,invvpid
modrm */
BadOp ();
else
OP_E (bytemode, sizeflag);
Modified: head/contrib/binutils/opcodes/i386-opc.tbl
==============================================================================
--- head/contrib/binutils/opcodes/i386-opc.tbl Fri Jul 6 14:25:59 2012
(r238166)
+++ head/contrib/binutils/opcodes/i386-opc.tbl Fri Jul 6 14:28:18 2012
(r238167)
@@ -1289,6 +1289,10 @@ mwait, 2, 0xf01, 0xc9, CpuSSE3|CpuNo64,
mwait, 2, 0xf01, 0xc9, CpuSSE3|Cpu64,
No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt|NoRex64, { Reg64, Reg64 }
// VMX instructions.
+invept, 2, 0x660f3880, None, CpuVMX|CpuNo64,
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, {
BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32 }
+invept, 2, 0x660f3880, None, CpuVMX|Cpu64,
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, {
BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 }
+invvpid, 2, 0x660f3881, None, CpuVMX|CpuNo64,
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, {
BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32 }
+invvpid, 2, 0x660f3881, None, CpuVMX|Cpu64,
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, {
BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 }
vmcall, 0, 0xf01, 0xc1, CpuVMX,
No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 }
vmclear, 1, 0x660fc7, 0x6, CpuVMX,
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, {
BaseIndex|Disp8|Disp16|Disp32|Disp32S }
vmlaunch, 0, 0xf01, 0xc2, CpuVMX,
No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 }
Modified: head/contrib/binutils/opcodes/i386-tbl.h
==============================================================================
--- head/contrib/binutils/opcodes/i386-tbl.h Fri Jul 6 14:25:59 2012
(r238166)
+++ head/contrib/binutils/opcodes/i386-tbl.h Fri Jul 6 14:28:18 2012
(r238167)
@@ -3625,6 +3625,22 @@ const template i386_optab[] =
No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt|NoRex64,
{ Reg64,
Reg64 } },
+ { "invept", 2, 0x660f3880, None, CpuVMX|CpuNo64,
+ Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
+ { BaseIndex|Disp8|Disp16|Disp32|Disp32S,
+ Reg32 } },
+ { "invept", 2, 0x660f3880, None, CpuVMX|Cpu64,
+ Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
+ { BaseIndex|Disp8|Disp16|Disp32|Disp32S,
+ Reg64 } },
+ { "invvpid", 2, 0x660f3881, None, CpuVMX|CpuNo64,
+ Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
+ { BaseIndex|Disp8|Disp16|Disp32|Disp32S,
+ Reg32 } },
+ { "invvpid", 2, 0x660f3881, None, CpuVMX|Cpu64,
+ Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
+ { BaseIndex|Disp8|Disp16|Disp32|Disp32S,
+ Reg64 } },
{ "vmcall", 0, 0xf01, 0xc1, CpuVMX,
No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt,
{ 0 } },
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