Author: adrian
Date: Tue Jul 10 07:43:31 2012
New Revision: 238343
URL: http://svn.freebsd.org/changeset/base/238343
Log:
Flip on EDMA RX of both HP and LP queue frames.
Yes, this is in the legacy interrupt path. The NIC does support
MSI but I haven't yet sat down and written that code.
Modified:
head/sys/dev/ath/if_ath.c
Modified: head/sys/dev/ath/if_ath.c
==============================================================================
--- head/sys/dev/ath/if_ath.c Tue Jul 10 06:50:19 2012 (r238342)
+++ head/sys/dev/ath/if_ath.c Tue Jul 10 07:43:31 2012 (r238343)
@@ -1621,7 +1621,11 @@ ath_intr(void *arg)
/* bump tx trigger level */
ath_hal_updatetxtriglevel(ah, AH_TRUE);
}
- if (status & HAL_INT_RX) {
+ /*
+ * Handle both the legacy and RX EDMA interrupt bits.
+ * Note that HAL_INT_RXLP is also HAL_INT_RXDESC.
+ */
+ if (status & (HAL_INT_RX | HAL_INT_RXHP | HAL_INT_RXLP)) {
sc->sc_stats.ast_rx_intr++;
taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask);
}
@@ -1867,6 +1871,14 @@ ath_init(void *arg)
sc->sc_imask = HAL_INT_RX | HAL_INT_TX
| HAL_INT_RXEOL | HAL_INT_RXORN
| HAL_INT_FATAL | HAL_INT_GLOBAL;
+
+ /*
+ * Enable RX EDMA bits. Note these overlap with
+ * HAL_INT_RX and HAL_INT_RXDESC respectively.
+ */
+ if (sc->sc_isedma)
+ sc->sc_imask |= (HAL_INT_RXHP | HAL_INT_RXLP);
+
/*
* Enable MIB interrupts when there are hardware phy counters.
* Note we only do this (at the moment) for station mode.
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