Author: adrian
Date: Thu Sep 13 07:17:29 2012
New Revision: 240444
URL: http://svn.freebsd.org/changeset/base/240444
Log:
Compensate for half/quarter rate differences in MAC clock speed.
This fixes the incorrect slot (and likely ACK/RTS timeout) values
which I see when enabling half/quarter rate support on the AR9280.
The resulting math matches the expected calculated default values.
Modified:
head/sys/dev/ath/ath_hal/ah.c
Modified: head/sys/dev/ath/ath_hal/ah.c
==============================================================================
--- head/sys/dev/ath/ath_hal/ah.c Thu Sep 13 06:32:52 2012
(r240443)
+++ head/sys/dev/ath/ath_hal/ah.c Thu Sep 13 07:17:29 2012
(r240444)
@@ -514,6 +514,13 @@ ath_hal_mac_clks(struct ath_hal *ah, u_i
clks <<= 1;
} else
clks = usecs * CLOCK_RATE[WIRELESS_MODE_11b];
+
+ /* Compensate for half/quarter rate */
+ if (c != AH_NULL && IEEE80211_IS_CHAN_HALF(c))
+ clks = clks / 2;
+ else if (c != AH_NULL && IEEE80211_IS_CHAN_QUARTER(c))
+ clks = clks / 4;
+
return clks;
}
_______________________________________________
[email protected] mailing list
http://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "[email protected]"
