Author: mav
Date: Sun Nov 10 23:48:16 2013
New Revision: 257932
URL: http://svnweb.freebsd.org/changeset/base/257932
Log:
Use relaxed (write-only) memory barriers when writing some of queue index
registers (for now on ISP2400+). We never read those registers back and
AFAIK their semantics does not require any immediate reaction on write.
Modified:
head/sys/dev/isp/isp_freebsd.h
head/sys/dev/isp/isp_pci.c
Modified: head/sys/dev/isp/isp_freebsd.h
==============================================================================
--- head/sys/dev/isp/isp_freebsd.h Sun Nov 10 23:35:08 2013
(r257931)
+++ head/sys/dev/isp/isp_freebsd.h Sun Nov 10 23:48:16 2013
(r257932)
@@ -459,6 +459,39 @@ default:
\
break; \
}
+#define MEMORYBARRIERW(isp, type, offset, size, chan) \
+switch (type) { \
+case SYNC_SFORDEV: \
+{ \
+ struct isp_fc *fc = ISP_FC_PC(isp, chan); \
+ bus_dmamap_sync(fc->tdmat, fc->tdmap, \
+ BUS_DMASYNC_PREWRITE); \
+ break; \
+} \
+case SYNC_REQUEST: \
+ bus_dmamap_sync(isp->isp_osinfo.cdmat, \
+ isp->isp_osinfo.cdmap, BUS_DMASYNC_PREWRITE); \
+ break; \
+case SYNC_SFORCPU: \
+{ \
+ struct isp_fc *fc = ISP_FC_PC(isp, chan); \
+ bus_dmamap_sync(fc->tdmat, fc->tdmap, \
+ BUS_DMASYNC_POSTWRITE); \
+ break; \
+} \
+case SYNC_RESULT: \
+ bus_dmamap_sync(isp->isp_osinfo.cdmat, \
+ isp->isp_osinfo.cdmap, BUS_DMASYNC_POSTWRITE); \
+ break; \
+case SYNC_REG: \
+ bus_space_barrier(isp->isp_osinfo.bus_tag, \
+ isp->isp_osinfo.bus_handle, offset, size, \
+ BUS_SPACE_BARRIER_WRITE); \
+ break; \
+default: \
+ break; \
+}
+
#define MBOX_ACQUIRE isp_mbox_acquire
#define MBOX_WAIT_COMPLETE isp_mbox_wait_complete
#define MBOX_NOTIFY_COMPLETE isp_mbox_notify_done
Modified: head/sys/dev/isp/isp_pci.c
==============================================================================
--- head/sys/dev/isp/isp_pci.c Sun Nov 10 23:35:08 2013 (r257931)
+++ head/sys/dev/isp/isp_pci.c Sun Nov 10 23:48:16 2013 (r257932)
@@ -1432,6 +1432,15 @@ isp_pci_wr_reg_2400(ispsoftc_t *isp, int
case BIU2400_GPIOE:
case BIU2400_HSEMA:
BXW4(isp, IspVirt2Off(isp, regoff), val);
+#ifdef MEMORYBARRIERW
+ if (regoff == BIU2400_REQINP ||
+ regoff == BIU2400_RSPOUTP ||
+ regoff == BIU2400_PRI_REQINP ||
+ regoff == BIU2400_ATIO_RSPOUTP)
+ MEMORYBARRIERW(isp, SYNC_REG,
+ IspVirt2Off(isp, regoff), 4, -1)
+ else
+#endif
MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 4, -1);
break;
default:
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