Author: br
Date: Tue Nov 12 18:02:56 2013
New Revision: 258057
URL: http://svnweb.freebsd.org/changeset/base/258057

Log:
  Add support for Freescale Vybrid Family VF600 heterogeneous
  ARM Cortex-A5/M4 SoC (M4 core is not used in this work).
  
  Support includes device drivers for:
  - NAND Flash Controller (NFC)
  - USB Enhanced Host Controller Interface (EHCI)
  - General-Purpose Input/Output (GPIO)
  - Universal Asynchronous Receiver/Transmitter (UART)
  
  Also supported:
  - Generic Interrupt Controller (GIC)
  - MPCore timer
  - ffec ethernet driver
  
  Reviewed by:  ray
  Approved by:  cognet (mentor)

Added:
  head/sys/arm/conf/COSMIC   (contents, props changed)
  head/sys/arm/freescale/vybrid/
  head/sys/arm/freescale/vybrid/files.vybrid   (contents, props changed)
  head/sys/arm/freescale/vybrid/std.vybrid   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_anadig.c   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_ccm.c   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_common.c   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_common.h   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_ehci.c   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_gpio.c   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_iomuxc.c   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_iomuxc.h   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_machdep.c   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_mscm.c   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_nfc.c   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_src.c   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_src.h   (contents, props changed)
  head/sys/arm/freescale/vybrid/vf_uart.c   (contents, props changed)
  head/sys/boot/fdt/dts/vybrid-cosmic.dts   (contents, props changed)
  head/sys/boot/fdt/dts/vybrid.dtsi   (contents, props changed)
Modified:
  head/sys/dev/uart/uart.h
  head/sys/dev/uart/uart_bus_fdt.c

Added: head/sys/arm/conf/COSMIC
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/conf/COSMIC    Tue Nov 12 18:02:56 2013        (r258057)
@@ -0,0 +1,139 @@
+# Kernel configuration for Cosmic Board (Freescale Vybrid Family development 
board).
+#
+# For more information on this file, please read the config(5) manual page,
+# and/or the handbook section on Kernel Configuration Files:
+#
+#    
http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
+#
+# The handbook is also available locally in /usr/share/doc/handbook
+# if you've installed the doc distribution, otherwise always see the
+# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
+# latest information.
+#
+# An exhaustive list of options and more detailed explanations of the
+# device lines is also present in the ../../conf/NOTES and NOTES files.
+# If you are in doubt as to the purpose or necessity of a line, check first
+# in NOTES.
+#
+# $FreeBSD$
+
+ident          COSMIC
+
+include                "../freescale/vybrid/std.vybrid"
+
+makeoptions    MODULES_OVERRIDE=""
+makeoptions    WITHOUT_MODULES="ahc"
+
+makeoptions    DEBUG=-g                #Build kernel with gdb(1) debug symbols
+makeoptions    WERROR="-Werror"
+
+options                HZ=100 ##
+options                SCHED_4BSD              #4BSD scheduler
+options                INET                    #InterNETworking
+options                INET6                   #IPv6 communications protocols
+options                FFS                     #Berkeley Fast Filesystem
+options                SOFTUPDATES
+options                UFS_ACL                 #Support for access control 
lists
+options                UFS_DIRHASH             #Improve performance on big 
directories
+options                MSDOSFS                 #MSDOS Filesystem
+options                CD9660                  #ISO 9660 Filesystem
+options                PROCFS                  #Process filesystem (requires 
PSEUDOFS)
+options                PSEUDOFS                #Pseudo-filesystem framework
+#options               NANDFS                  #NAND Filesystem
+options                TMPFS
+options                COMPAT_43               #Compatible with BSD 4.3 [KEEP 
THIS!]
+options                SCSI_DELAY=5000         #Delay (in ms) before probing 
SCSI
+options                KTRACE
+options                SYSVSHM                 #SYSV-style shared memory
+options                SYSVMSG                 #SYSV-style message queues
+options                SYSVSEM                 #SYSV-style semaphores
+options                _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time 
extensions
+options                KBD_INSTALL_CDEV
+options                PREEMPTION
+options                FREEBSD_BOOT_LOADER
+options        VFP             # vfp/neon
+
+# Debugging
+makeoptions    DEBUG=-g                #Build kernel with gdb(1) debug symbols
+options                BREAK_TO_DEBUGGER
+#options       VERBOSE_SYSINIT         #Enable verbose sysinit messages
+options                KDB
+options                DDB                     #Enable the kernel debugger
+options                INVARIANTS              #Enable calls of extra sanity 
checking
+options                INVARIANT_SUPPORT       #Extra sanity checks of 
internal structures, required by INVARIANTS
+#options       WITNESS                 #Enable checks to detect deadlocks and 
cycles
+#options       WITNESS_SKIPSPIN        #Don't run witness on spinlocks for 
speed
+options                DIAGNOSTIC
+
+# NFS support
+options                NFSCL                   #Network Filesystem Client
+options                NFSLOCKD                #Network Lock Manager
+options                NFS_ROOT                #NFS usable as /, requires 
NFSCLIENT
+
+# Uncomment this for NFS root
+#options       NFS_ROOT                #NFS usable as /, requires NFSCL
+#options       BOOTP_NFSROOT
+#options       BOOTP_COMPAT
+#options       BOOTP
+#options       BOOTP_NFSV3
+#options       BOOTP_WIRED_TO=ffec0
+
+device         mmc                     # mmc/sd bus
+device         mmcsd                   # mmc/sd flash cards
+device         sdhci                   # generic sdhci
+
+#options               ROOTDEVNAME=\"nfs:10.5.0.1:/tftpboot/cosmic\"
+#options               ROOTDEVNAME=\"nandfs:/dev/gnand0s.root\"
+options                ROOTDEVNAME=\"ufs:/dev/da0\"
+
+#options       SMP
+
+# Pseudo devices
+
+device         loop
+device         random
+device         pty
+device         md
+device         gpio
+
+# USB support
+device         usb
+options                USB_DEBUG
+#options       USB_REQ_DEBUG
+#options       USB_VERBOSE
+#device                musb
+device         ehci
+#device                ohci
+
+device         umass
+device         scbus                   # SCSI bus (required for SCSI)
+device         da                      # Direct Access (disks)
+device         pass
+
+# SATA
+#device                ata
+#device                atadisk
+#device                mvs
+
+device         nand
+
+# Serial ports
+device         uart
+
+# I2C (TWSI)
+#device                iic
+#device                iicbus
+
+# Ethernet
+device         ether
+device         ffec
+
+# USB ethernet support, requires miibus
+device         miibus
+device         axe                     # ASIX Electronics USB Ethernet
+device         bpf                     # Berkeley packet filter
+
+#FDT
+options                FDT
+options                FDT_DTB_STATIC
+makeoptions    FDT_DTS_FILE=vybrid-cosmic.dts

Added: head/sys/arm/freescale/vybrid/files.vybrid
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/freescale/vybrid/files.vybrid  Tue Nov 12 18:02:56 2013        
(r258057)
@@ -0,0 +1,28 @@
+# $FreeBSD$
+
+kern/kern_clocksource.c                                standard
+
+arm/arm/bus_space_generic.c                    standard
+arm/arm/bus_space_asm_generic.S                        standard
+arm/arm/cpufunc_asm_armv5.S                    standard
+arm/arm/cpufunc_asm_arm10.S                    standard
+arm/arm/cpufunc_asm_arm11.S                    standard
+arm/arm/cpufunc_asm_armv7.S                    standard
+arm/arm/irq_dispatch.S                         standard
+
+arm/arm/bus_space-v6.c                         standard
+arm/arm/gic.c                                  standard
+arm/arm/mpcore_timer.c                         standard
+
+arm/freescale/vybrid/vf_machdep.c              standard
+arm/freescale/vybrid/vf_common.c               standard
+arm/freescale/vybrid/vf_ccm.c                  standard
+arm/freescale/vybrid/vf_anadig.c               standard
+arm/freescale/vybrid/vf_iomuxc.c               standard
+arm/freescale/vybrid/vf_mscm.c                 standard
+arm/freescale/vybrid/vf_src.c                  standard
+arm/freescale/vybrid/vf_nfc.c                  optional        nand
+arm/freescale/vybrid/vf_ehci.c                 optional        ehci
+arm/freescale/vybrid/vf_gpio.c                 optional        gpio
+arm/freescale/vybrid/vf_uart.c                 optional        uart
+dev/ffec/if_ffec.c                             optional        ffec

Added: head/sys/arm/freescale/vybrid/std.vybrid
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/freescale/vybrid/std.vybrid    Tue Nov 12 18:02:56 2013        
(r258057)
@@ -0,0 +1,20 @@
+# $FreeBSD$
+
+makeoption     ARM_LITTLE_ENDIAN
+
+cpu            CPU_CORTEXA
+machine                arm armv6
+
+options                PHYSADDR=0x80000000
+
+makeoptions    KERNPHYSADDR=0x80100000
+options                KERNPHYSADDR=0x80100000
+
+makeoptions    KERNVIRTADDR=0xc0100000
+options                KERNVIRTADDR=0xc0100000
+
+options                STARTUP_PAGETABLE_ADDR=0x81000000
+
+options                ARM_L2_PIPT
+
+files          "../freescale/vybrid/files.vybrid"

Added: head/sys/arm/freescale/vybrid/vf_anadig.c
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/freescale/vybrid/vf_anadig.c   Tue Nov 12 18:02:56 2013        
(r258057)
@@ -0,0 +1,214 @@
+/*-
+ * Copyright (c) 2013 Ruslan Bukin <[email protected]>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Vybrid Family Analog components control digital interface (ANADIG)
+ * Chapter 11, Vybrid Reference Manual, Rev. 5, 07/2013
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/malloc.h>
+#include <sys/rman.h>
+#include <sys/timeet.h>
+#include <sys/timetc.h>
+#include <sys/watchdog.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <machine/bus.h>
+#include <machine/fdt.h>
+#include <machine/cpu.h>
+#include <machine/intr.h>
+
+#include <arm/freescale/vybrid/vf_common.h>
+
+#define        ANADIG_PLL3_CTRL        0x010   /* PLL3 Control */
+#define        ANADIG_PLL7_CTRL        0x020   /* PLL7 Control */
+#define        ANADIG_PLL2_CTRL        0x030   /* PLL2 Control */
+#define        ANADIG_PLL2_SS          0x040   /* PLL2 Spread Spectrum */
+#define        ANADIG_PLL2_NUM         0x050   /* PLL2 Numerator */
+#define        ANADIG_PLL2_DENOM       0x060   /* PLL2 Denominator */
+#define        ANADIG_PLL4_CTRL        0x070   /* PLL4 Control */
+#define        ANADIG_PLL4_NUM         0x080   /* PLL4 Numerator */
+#define        ANADIG_PLL4_DENOM       0x090   /* PLL4 Denominator */
+#define        ANADIG_PLL6_CTRL        0x0A0   /* PLL6 Control */
+#define        ANADIG_PLL6_NUM         0x0B0   /* PLL6 Numerator */
+#define        ANADIG_PLL6_DENOM       0x0C0   /* PLL6 Denominator */
+#define        ANADIG_PLL5_CTRL        0x0E0   /* PLL5 Control */
+#define        ANADIG_PLL3_PFD         0x0F0   /* PLL3 PFD */
+#define        ANADIG_PLL2_PFD         0x100   /* PLL2 PFD */
+#define        ANADIG_REG_1P1          0x110   /* Regulator 1P1 */
+#define        ANADIG_REG_3P0          0x120   /* Regulator 3P0 */
+#define        ANADIG_REG_2P5          0x130   /* Regulator 2P5 */
+#define        ANADIG_ANA_MISC0        0x150   /* Analog Miscellaneous */
+#define        ANADIG_ANA_MISC1        0x160   /* Analog Miscellaneous */
+#define        ANADIG_ANADIG_DIGPROG   0x260   /* Digital Program */
+#define        ANADIG_PLL1_CTRL        0x270   /* PLL1 Control */
+#define        ANADIG_PLL1_SS          0x280   /* PLL1 Spread Spectrum */
+#define        ANADIG_PLL1_NUM         0x290   /* PLL1 Numerator */
+#define        ANADIG_PLL1_DENOM       0x2A0   /* PLL1 Denominator */
+#define        ANADIG_PLL1_PFD         0x2B0   /* PLL1_PFD */
+#define        ANADIG_PLL_LOCK         0x2C0   /* PLL Lock */
+
+#define        USB_VBUS_DETECT(n)              (0x1A0 + 0x60 * n)
+#define        USB_CHRG_DETECT(n)              (0x1B0 + 0x60 * n)
+#define        USB_VBUS_DETECT_STATUS(n)       (0x1C0 + 0x60 * n)
+#define        USB_CHRG_DETECT_STATUS(n)       (0x1D0 + 0x60 * n)
+#define        USB_LOOPBACK(n)                 (0x1E0 + 0x60 * n)
+#define        USB_MISC(n)                     (0x1F0 + 0x60 * n)
+
+#define        ANADIG_PLL_LOCKED       (1 << 31)
+#define        ENABLE_LINREG           (1 << 0)
+#define        EN_CLK_TO_UTMI          (1 << 30)
+
+#define        CTRL_BYPASS             (1 << 16)
+#define        CTRL_PWR                (1 << 12)
+#define        CTRL_PLL_EN             (1 << 13)
+#define        EN_USB_CLKS             (1 << 6)
+
+struct anadig_softc {
+       struct resource         *res[1];
+       bus_space_tag_t         bst;
+       bus_space_handle_t      bsh;
+};
+
+static struct resource_spec anadig_spec[] = {
+       { SYS_RES_MEMORY,       0,      RF_ACTIVE },
+       { -1, 0 }
+};
+
+static int
+anadig_probe(device_t dev)
+{
+
+       if (!ofw_bus_is_compatible(dev, "fsl,mvf600-anadig"))
+               return (ENXIO);
+
+       device_set_desc(dev, "Vybrid Family ANADIG Unit");
+       return (BUS_PROBE_DEFAULT);
+}
+
+static int
+enable_pll(struct anadig_softc *sc, int pll_ctrl)
+{
+       int reg;
+
+       reg = READ4(sc, pll_ctrl);
+       reg &= ~(CTRL_BYPASS | CTRL_PWR);
+       if (pll_ctrl == ANADIG_PLL3_CTRL || pll_ctrl == ANADIG_PLL7_CTRL) {
+               /* It is USB PLL. Power bit logic is reversed */
+               reg |= (CTRL_PWR | EN_USB_CLKS);
+       }
+       WRITE4(sc, pll_ctrl, reg);
+
+       /* Wait for PLL lock */
+       while (!(READ4(sc, pll_ctrl) & ANADIG_PLL_LOCKED))
+               ;
+
+       reg = READ4(sc, pll_ctrl);
+       reg |= (CTRL_PLL_EN);
+       WRITE4(sc, pll_ctrl, reg);
+
+       return (0);
+}
+
+static int
+anadig_attach(device_t dev)
+{
+       struct anadig_softc *sc;
+       int reg;
+
+       sc = device_get_softc(dev);
+
+       if (bus_alloc_resources(dev, anadig_spec, sc->res)) {
+               device_printf(dev, "could not allocate resources\n");
+               return (ENXIO);
+       }
+
+       /* Memory interface */
+       sc->bst = rman_get_bustag(sc->res[0]);
+       sc->bsh = rman_get_bushandle(sc->res[0]);
+
+       /* Enable USB PLLs */
+       enable_pll(sc, ANADIG_PLL3_CTRL);
+       enable_pll(sc, ANADIG_PLL7_CTRL);
+
+       /* Enable other */
+       enable_pll(sc, ANADIG_PLL1_CTRL);
+       enable_pll(sc, ANADIG_PLL2_CTRL);
+       enable_pll(sc, ANADIG_PLL4_CTRL);
+       enable_pll(sc, ANADIG_PLL5_CTRL);
+       enable_pll(sc, ANADIG_PLL6_CTRL);
+
+       /* Enable USB voltage regulator */
+       reg = READ4(sc, ANADIG_REG_3P0);
+       reg |= (ENABLE_LINREG);
+       WRITE4(sc, ANADIG_REG_3P0, reg);
+
+       /* Give clocks to USB */
+       reg = READ4(sc, USB_MISC(0));
+       reg |= (EN_CLK_TO_UTMI);
+       WRITE4(sc, USB_MISC(0), reg);
+
+       reg = READ4(sc, USB_MISC(1));
+       reg |= (EN_CLK_TO_UTMI);
+       WRITE4(sc, USB_MISC(1), reg);
+
+#if 0
+       printf("USB_ANALOG_USB_MISC(0) == 0x%08x\n",
+           READ4(sc, USB_ANALOG_USB_MISC(0)));
+       printf("USB_ANALOG_USB_MISC(1) == 0x%08x\n",
+           READ4(sc, USB_ANALOG_USB_MISC(1)));
+#endif
+
+       return (0);
+}
+
+static device_method_t anadig_methods[] = {
+       DEVMETHOD(device_probe,         anadig_probe),
+       DEVMETHOD(device_attach,        anadig_attach),
+       { 0, 0 }
+};
+
+static driver_t anadig_driver = {
+       "anadig",
+       anadig_methods,
+       sizeof(struct anadig_softc),
+};
+
+static devclass_t anadig_devclass;
+
+DRIVER_MODULE(anadig, simplebus, anadig_driver, anadig_devclass, 0, 0);

Added: head/sys/arm/freescale/vybrid/vf_ccm.c
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/freescale/vybrid/vf_ccm.c      Tue Nov 12 18:02:56 2013        
(r258057)
@@ -0,0 +1,188 @@
+/*-
+ * Copyright (c) 2013 Ruslan Bukin <[email protected]>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Vybrid Family Clock Controller Module (CCM)
+ * Chapter 10, Vybrid Reference Manual, Rev. 5, 07/2013
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/malloc.h>
+#include <sys/rman.h>
+#include <sys/timeet.h>
+#include <sys/timetc.h>
+#include <sys/watchdog.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/openfirm.h>
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <machine/bus.h>
+#include <machine/fdt.h>
+#include <machine/cpu.h>
+#include <machine/intr.h>
+
+#include <arm/freescale/vybrid/vf_common.h>
+
+#define        CCM_CCR         0x00    /* Control Register */
+#define        CCM_CSR         0x04    /* Status Register */
+#define        CCM_CCSR        0x08    /* Clock Switcher Register */
+#define        CCM_CACRR       0x0C    /* ARM Clock Root Register */
+#define        CCM_CSCMR1      0x10    /* Serial Clock Multiplexer Register 1 
*/
+#define        CCM_CSCDR1      0x14    /* Serial Clock Divider Register 1 */
+#define        CCM_CSCDR2      0x18    /* Serial Clock Divider Register 2 */
+#define        CCM_CSCDR3      0x1C    /* Serial Clock Divider Register 3 */
+#define        CCM_CSCMR2      0x20    /* Serial Clock Multiplexer Register 2 
*/
+#define        CCM_CTOR        0x28    /* Testing Observability Register */
+#define        CCM_CLPCR       0x2C    /* Low Power Control Register */
+#define        CCM_CISR        0x30    /* Interrupt Status Register */
+#define        CCM_CIMR        0x34    /* Interrupt Mask Register */
+#define        CCM_CCOSR       0x38    /* Clock Output Source Register */
+#define        CCM_CGPR        0x3C    /* General Purpose Register */
+
+#define        CCM_CCGRN       12
+#define        CCM_CCGR(n)     (0x40 + (n * 0x04))     /* Clock Gating 
Register */
+#define        CCM_CMEOR(n)    (0x70 + (n * 0x70))     /* Module Enable 
Override Reg */
+#define        CCM_CCPGR(n)    (0x90 + (n * 0x04))     /* Platform Clock 
Gating Reg */
+
+#define        CCM_CPPDSR      0x88    /* PLL PFD Disable Status Register */
+#define        CCM_CCOWR       0x8C    /* CORE Wakeup Register */
+
+#define        PLL3_PFD4_EN    (1 << 31)
+#define        PLL3_PFD3_EN    (1 << 30)
+#define        PLL3_PFD2_EN    (1 << 29)
+#define        PLL3_PFD1_EN    (1 << 28)
+#define        PLL2_PFD4_EN    (1 << 15)
+#define        PLL2_PFD3_EN    (1 << 14)
+#define        PLL2_PFD2_EN    (1 << 13)
+#define        PLL2_PFD1_EN    (1 << 12)
+#define        PLL1_PFD4_EN    (1 << 11)
+#define        PLL1_PFD3_EN    (1 << 10)
+#define        PLL1_PFD2_EN    (1 << 9)
+#define        PLL1_PFD1_EN    (1 << 8)
+
+/* CCM_CCR */
+#define        FIRC_EN         (1 << 16)
+#define        FXOSC_EN        (1 << 12)
+#define        FXOSC_RDY       (1 << 5)
+
+/* CCM_CSCDR1 */
+#define        ENET_TS_EN      (1 << 23)
+#define        RMII_CLK_EN     (1 << 24)
+
+struct ccm_softc {
+       struct resource         *res[1];
+       bus_space_tag_t         bst;
+       bus_space_handle_t      bsh;
+       device_t                dev;
+};
+
+static struct resource_spec ccm_spec[] = {
+       { SYS_RES_MEMORY,       0,      RF_ACTIVE },
+       { -1, 0 }
+};
+
+static int
+ccm_probe(device_t dev)
+{
+
+       if (!ofw_bus_is_compatible(dev, "fsl,mvf600-ccm"))
+               return (ENXIO);
+
+       device_set_desc(dev, "Vybrid Family CCM Unit");
+       return (BUS_PROBE_DEFAULT);
+}
+
+static int
+ccm_attach(device_t dev)
+{
+       struct ccm_softc *sc;
+       int reg;
+       int i;
+
+       sc = device_get_softc(dev);
+       sc->dev = dev;
+
+       if (bus_alloc_resources(dev, ccm_spec, sc->res)) {
+               device_printf(dev, "could not allocate resources\n");
+               return (ENXIO);
+       }
+
+       /* Memory interface */
+       sc->bst = rman_get_bustag(sc->res[0]);
+       sc->bsh = rman_get_bushandle(sc->res[0]);
+
+       /* Enable oscillator */
+       reg = READ4(sc, CCM_CCR);
+       reg |= (FIRC_EN | FXOSC_EN);
+       WRITE4(sc, CCM_CCR, reg);
+
+       /* Wait 10 times */
+       for (i = 0; i < 10; i++) {
+               if (READ4(sc, CCM_CSR) & FXOSC_RDY) {
+                       device_printf(sc->dev, "On board oscillator is 
ready.\n");
+                       break;
+               }
+
+               cpufunc_nullop();
+       }
+
+       /* Clock is on during all modes, except stop mode. */
+       for (i = 0; i < CCM_CCGRN; i++) {
+               WRITE4(sc, CCM_CCGR(i), 0xffffffff);
+       }
+
+       /* Enable ENET clocks */
+       reg = READ4(sc, CCM_CSCDR1);
+       reg |= (ENET_TS_EN | RMII_CLK_EN);
+       WRITE4(sc, CCM_CSCDR1, reg);
+
+       return (0);
+}
+
+static device_method_t ccm_methods[] = {
+       DEVMETHOD(device_probe,         ccm_probe),
+       DEVMETHOD(device_attach,        ccm_attach),
+       { 0, 0 }
+};
+
+static driver_t ccm_driver = {
+       "ccm",
+       ccm_methods,
+       sizeof(struct ccm_softc),
+};
+
+static devclass_t ccm_devclass;
+
+DRIVER_MODULE(ccm, simplebus, ccm_driver, ccm_devclass, 0, 0);

Added: head/sys/arm/freescale/vybrid/vf_common.c
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/freescale/vybrid/vf_common.c   Tue Nov 12 18:02:56 2013        
(r258057)
@@ -0,0 +1,86 @@
+/*-
+ * Copyright (c) 2013 Ruslan Bukin <[email protected]>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/kernel.h>
+
+#include <dev/fdt/fdt_common.h>
+#include <dev/ofw/openfirm.h>
+
+#include <machine/bus.h>
+#include <machine/fdt.h>
+
+#include <arm/freescale/vybrid/vf_src.h>
+
+void
+cpu_reset(void)
+{
+       phandle_t src;
+       uint32_t addr, paddr;
+       bus_addr_t vaddr;
+
+       if (src_swreset() == 0)
+               goto end;
+
+       src = OF_finddevice("src");
+       if ((src != 0) && (OF_getprop(src, "reg", &paddr, sizeof(paddr))) > 0) {
+               addr = fdt32_to_cpu(paddr);
+               if (bus_space_map(fdtbus_bs_tag, addr, 0x10, 0, &vaddr) == 0) {
+                       bus_space_write_4(fdtbus_bs_tag, vaddr, 0x00, SW_RST);
+               }
+       }
+
+end:
+       while (1);
+}
+
+struct fdt_fixup_entry fdt_fixup_table[] = {
+       { NULL, NULL }
+};
+
+static int
+fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
+    int *pol)
+{
+
+       if (!fdt_is_compatible(node, "arm,gic"))
+               return (ENXIO);
+
+       *interrupt = fdt32_to_cpu(intr[0]);
+       *trig = INTR_TRIGGER_CONFORM;
+       *pol = INTR_POLARITY_CONFORM;
+       return (0);
+}
+
+fdt_pic_decode_t fdt_pic_table[] = {
+       &fdt_pic_decode_ic,
+       NULL
+};

Added: head/sys/arm/freescale/vybrid/vf_common.h
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/freescale/vybrid/vf_common.h   Tue Nov 12 18:02:56 2013        
(r258057)
@@ -0,0 +1,40 @@
+/*-
+ * Copyright (c) 2013 Ruslan Bukin <[email protected]>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#define        READ4(_sc, _reg)        \
+       bus_space_read_4(_sc->bst, _sc->bsh, _reg)
+#define        WRITE4(_sc, _reg, _val) \
+       bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val)
+#define        READ2(_sc, _reg)        \
+       bus_space_read_2(_sc->bst, _sc->bsh, _reg)
+#define        WRITE2(_sc, _reg, _val) \
+       bus_space_write_2(_sc->bst, _sc->bsh, _reg, _val)
+#define        READ1(_sc, _reg)        \
+       bus_space_read_1(_sc->bst, _sc->bsh, _reg)
+#define        WRITE1(_sc, _reg, _val) \
+       bus_space_write_1(_sc->bst, _sc->bsh, _reg, _val)

Added: head/sys/arm/freescale/vybrid/vf_ehci.c
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/freescale/vybrid/vf_ehci.c     Tue Nov 12 18:02:56 2013        
(r258057)
@@ -0,0 +1,416 @@
+/*-
+ * Copyright (c) 2013 Ruslan Bukin <[email protected]>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Vybrid Family Universal Serial Bus (USB) Controller
+ * Chapter 44-45, Vybrid Reference Manual, Rev. 5, 07/2013
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include "opt_bus.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/condvar.h>
+#include <sys/rman.h>
+#include <sys/gpio.h>
+
+#include <dev/ofw/ofw_bus.h>
+#include <dev/ofw/ofw_bus_subr.h>
+
+#include <dev/usb/usb.h>
+#include <dev/usb/usbdi.h>
+#include <dev/usb/usb_busdma.h>
+#include <dev/usb/usb_process.h>
+#include <dev/usb/usb_controller.h>
+#include <dev/usb/usb_bus.h>
+#include <dev/usb/controller/ehci.h>
+#include <dev/usb/controller/ehcireg.h>
+
+#include <dev/fdt/fdt_common.h>
+
+#include <machine/bus.h>
+#include <machine/resource.h>
+
+#include "gpio_if.h"
+#include "opt_platform.h"
+
+#define        ENUTMILEVEL3    (1 << 15)
+#define        ENUTMILEVEL2    (1 << 14)
+
+#define        GPIO_USB_PWR    134
+
+#define        USB_ID          0x000   /* Identification register */
+#define        USB_HWGENERAL   0x004   /* Hardware General */
+#define        USB_HWHOST      0x008   /* Host Hardware Parameters */
+#define        USB_HWDEVICE    0x00C   /* Device Hardware Parameters */
+#define        USB_HWTXBUF     0x010   /* TX Buffer Hardware Parameters */
+#define        USB_HWRXBUF     0x014   /* RX Buffer Hardware Parameters */
+#define        USB_HCSPARAMS   0x104   /* Host Controller Structural 
Parameters */
+
+#define        USBPHY_PWD              0x00    /* PHY Power-Down Register */
+#define        USBPHY_PWD_SET          0x04    /* PHY Power-Down Register */
+#define        USBPHY_PWD_CLR          0x08    /* PHY Power-Down Register */
+#define        USBPHY_PWD_TOG          0x0C    /* PHY Power-Down Register */
+#define        USBPHY_TX               0x10    /* PHY Transmitter Control 
Register */
+#define        USBPHY_RX               0x20    /* PHY Receiver Control 
Register */
+#define        USBPHY_RX_SET           0x24    /* PHY Receiver Control 
Register */
+#define        USBPHY_RX_CLR           0x28    /* PHY Receiver Control 
Register */
+#define        USBPHY_RX_TOG           0x2C    /* PHY Receiver Control 
Register */
+#define        USBPHY_CTRL             0x30    /* PHY General Control Register 
*/
+#define        USBPHY_CTRL_SET         0x34    /* PHY General Control Register 
*/
+#define        USBPHY_CTRL_CLR         0x38    /* PHY General Control Register 
*/
+#define        USBPHY_CTRL_TOG         0x3C    /* PHY General Control Register 
*/
+#define        USBPHY_STATUS           0x40    /* PHY Status Register */
+#define        USBPHY_DEBUG            0x50    /* PHY Debug Register */
+#define        USBPHY_DEBUG_SET        0x54    /* PHY Debug Register */
+#define        USBPHY_DEBUG_CLR        0x58    /* PHY Debug Register */
+#define        USBPHY_DEBUG_TOG        0x5C    /* PHY Debug Register */
+#define        USBPHY_DEBUG0_STATUS    0x60    /* UTMI Debug Status Register 0 
*/
+#define        USBPHY_DEBUG1           0x70    /* UTMI Debug Status Register 1 
*/
+#define        USBPHY_DEBUG1_SET       0x74    /* UTMI Debug Status Register 1 
*/
+#define        USBPHY_DEBUG1_CLR       0x78    /* UTMI Debug Status Register 1 
*/
+#define        USBPHY_DEBUG1_TOG       0x7C    /* UTMI Debug Status Register 1 
*/
+#define        USBPHY_VERSION          0x80    /* UTMI RTL Version */
+#define        USBPHY_IP               0x90    /* PHY IP Block Register */
+#define        USBPHY_IP_SET           0x94    /* PHY IP Block Register */
+#define        USBPHY_IP_CLR           0x98    /* PHY IP Block Register */
+#define        USBPHY_IP_TOG           0x9C    /* PHY IP Block Register */
+
+#define        USBPHY_CTRL_SFTRST      (1 << 31)
+#define        USBPHY_CTRL_CLKGATE     (1 << 30)
+#define        USBPHY_DEBUG_CLKGATE    (1 << 30)
+
+#define        PHY_READ4(_sc, _reg)            \
+       bus_space_read_4(_sc->bst_phy, _sc->bsh_phy, _reg)
+#define        PHY_WRITE4(_sc, _reg, _val)     \
+       bus_space_write_4(_sc->bst_phy, _sc->bsh_phy, _reg, _val)
+
+#define        USBC_READ4(_sc, _reg)           \
+       bus_space_read_4(_sc->bst_usbc, _sc->bsh_usbc, _reg)
+#define        USBC_WRITE4(_sc, _reg, _val)    \
+       bus_space_write_4(_sc->bst_usbc, _sc->bsh_usbc, _reg, _val)
+
+/* Forward declarations */
+static int     vybrid_ehci_attach(device_t dev);
+static int     vybrid_ehci_detach(device_t dev);
+static int     vybrid_ehci_probe(device_t dev);
+
+struct vybrid_ehci_softc {
+       ehci_softc_t            base;
+       device_t                dev;
+       struct resource         *res[6];
+       bus_space_tag_t         bst_phy;
+       bus_space_handle_t      bsh_phy;
+       bus_space_tag_t         bst_usbc;
+       bus_space_handle_t      bsh_usbc;
+};
+
+static struct resource_spec vybrid_ehci_spec[] = {
+       { SYS_RES_MEMORY,       0,      RF_ACTIVE },
+       { SYS_RES_MEMORY,       1,      RF_ACTIVE },
+       { SYS_RES_MEMORY,       2,      RF_ACTIVE },
+       { SYS_RES_IRQ,          0,      RF_ACTIVE },
+       { -1, 0 }
+};
+
+static device_method_t ehci_methods[] = {
+       /* Device interface */
+       DEVMETHOD(device_probe, vybrid_ehci_probe),
+       DEVMETHOD(device_attach, vybrid_ehci_attach),
+       DEVMETHOD(device_detach, vybrid_ehci_detach),
+       DEVMETHOD(device_suspend, bus_generic_suspend),
+       DEVMETHOD(device_resume, bus_generic_resume),
+       DEVMETHOD(device_shutdown, bus_generic_shutdown),
+
+       /* Bus interface */
+       DEVMETHOD(bus_print_child, bus_generic_print_child),
+
+       { 0, 0 }
+};
+
+/* kobj_class definition */
+static driver_t ehci_driver = {
+       "ehci",
+       ehci_methods,
+       sizeof(ehci_softc_t)
+};
+
+static devclass_t ehci_devclass;
+
+DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
+MODULE_DEPEND(ehci, usb, 1, 1, 1);
+
+/*
+ * Public methods
+ */
+static int
+vybrid_ehci_probe(device_t dev)
+{
+
+       if (ofw_bus_is_compatible(dev, "fsl,mvf600-usb-ehci") == 0)
+               return (ENXIO);
+
+       device_set_desc(dev, "Vybrid Family integrated USB controller");
+       return (BUS_PROBE_DEFAULT);
+}
+
+static int
+phy_init(struct vybrid_ehci_softc *esc)
+{
+       device_t sc_gpio_dev;
+       int reg;
+
+       /* Reset phy */
+       reg = PHY_READ4(esc, USBPHY_CTRL);
+       reg |= (USBPHY_CTRL_SFTRST);
+       PHY_WRITE4(esc, USBPHY_CTRL, reg);
+
+       /* Minimum reset time */
+       DELAY(10000);
+
+       reg &= ~(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE);
+       PHY_WRITE4(esc, USBPHY_CTRL, reg);
+
+       reg = (ENUTMILEVEL2 | ENUTMILEVEL3);
+       PHY_WRITE4(esc, USBPHY_CTRL_SET, reg);
+
+       /* Get the GPIO device, we need this to give power to USB */
+       sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
+       if (sc_gpio_dev == NULL) {
+               device_printf(esc->dev, "Error: failed to get the GPIO dev\n");
+               return (1);
+       }
+
+       /* Give power to USB */
+       GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_OUTPUT);
+       GPIO_PIN_SET(sc_gpio_dev, GPIO_USB_PWR, GPIO_PIN_HIGH);
+
+       /* Power up PHY */
+       PHY_WRITE4(esc, USBPHY_PWD, 0x00);
+
+       /* Ungate clocks */
+       reg = PHY_READ4(esc, USBPHY_DEBUG);
+       reg &= ~(USBPHY_DEBUG_CLKGATE);
+       PHY_WRITE4(esc, USBPHY_DEBUG, reg);
+
+#if 0
+       printf("USBPHY_CTRL == 0x%08x\n",
+           PHY_READ4(esc, USBPHY_CTRL));
+       printf("USBPHY_IP == 0x%08x\n",
+           PHY_READ4(esc, USBPHY_IP));
+       printf("USBPHY_STATUS == 0x%08x\n",
+           PHY_READ4(esc, USBPHY_STATUS));
+       printf("USBPHY_DEBUG == 0x%08x\n",
+           PHY_READ4(esc, USBPHY_DEBUG));
+       printf("USBPHY_DEBUG0_STATUS == 0x%08x\n",
+           PHY_READ4(esc, USBPHY_DEBUG0_STATUS));
+       printf("USBPHY_DEBUG1 == 0x%08x\n",
+           PHY_READ4(esc, USBPHY_DEBUG1));
+#endif
+
+       return (0);
+}
+
+static int
+vybrid_ehci_attach(device_t dev)
+{
+       struct vybrid_ehci_softc *esc;
+       ehci_softc_t *sc;
+       bus_space_handle_t bsh;
+       int err;
+       int reg;
+
+       esc = device_get_softc(dev);
+       esc->dev = dev;
+
+       sc = &esc->base;
+       sc->sc_bus.parent = dev;
+       sc->sc_bus.devices = sc->sc_devices;
+       sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
+
+       if (bus_alloc_resources(dev, vybrid_ehci_spec, esc->res)) {
+               device_printf(dev, "could not allocate resources\n");

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
_______________________________________________
[email protected] mailing list
http://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "[email protected]"

Reply via email to