Hi Michael,
If that works, then Brilliant! :-) :-)
Could you please fix this so the _PMC_USER_READ_WRITE_ is all in one place
(it’s too dangerous to split up), and put an architecture-specific #ifdef
around just the MCR instruction we care about.
With that, its good to commit, I’d say. I’ll likely follow up and exclude the
architectures that are unproven.
M
On 17 Jun 2014, at 10:52, Michael Tuexen <tue...@freebsd.org> wrote:
> On 16 Jun 2014, at 22:13, Mark R V Murray <ma...@freebsd.org> wrote:
> Hi Mark,
>
> I just adopted the comments to the code change. So here is the improved patch:
>
> Index: cpufunc.c
> ===================================================================
> --- cpufunc.c (revision 267575)
> +++ cpufunc.c (working copy)
> @@ -1404,18 +1404,36 @@
> static __inline void
> cpu_scc_setup_ccnt(void)
> {
> -/* This is how you give userland access to the CCNT and PMCn
> - * registers.
> - * BEWARE! This gives write access also, which may not be what
> - * you want!
> - */
> +#if defined(CPU_ARM1136) || defined(CPU_ARM1176)
> #ifdef _PMC_USER_READ_WRITE_
> - /* Set PMUSERENR[0] to allow userland access */
> + /* This is how you give userland access to the CCNT and PMCn
> + * registers.
> + * BEWARE! This gives write access also, which may not be what
> + * you want!
> + * Use the Secure User and Non-secure Access Validation Control Register
> + * to allow userland access
> + */
> + __asm volatile ("mcr p15, 0, %0, c15, c9, 0\n\t"
> + :
> + : "r"(0x00000001));
> +#endif
> + /* Set PMCR[2,0] to enable counters and reset CCNT */
> + __asm volatile ("mcr p15, 0, %0, c15, c12, 0\n\t"
> + :
> + : "r"(0x00000005));
> +#else
> +#ifdef _PMC_USER_READ_WRITE_
> + /* This is how you give userland access to the CCNT and PMCn
> + * registers.
> + * BEWARE! This gives write access also, which may not be what
> + * you want!
> + * Set PMUSERENR[0] to allow userland access
> + */
> __asm volatile ("mcr p15, 0, %0, c9, c14, 0\n\t"
> :
> : "r"(0x00000001));
> #endif
> - /* Set up the PMCCNTR register as a cyclecounter:
> + /* Set up the PMCCNTR register as a cyclecounter:
> * Set PMINTENCLR to 0xFFFFFFFF to block interrupts
> * Set PMCR[2,0] to enable counters and reset CCNT
> * Set PMCNTENSET to 0x80000000 to enable CCNT */
> @@ -1426,6 +1444,7 @@
> : "r"(0xFFFFFFFF),
> "r"(0x00000005),
> "r"(0x80000000));
> +#endif
> }
> #endif
>
> Let me know if I can help.
>
> Best regards
> Michael
>>
>> On 16 Jun 2014, at 20:38, Michael Tuexen <tue...@freebsd.org> wrote:
>>> Hmm, the documentation reads
>>
>> Which docs are you using?
>>
>> I’m using DDI0360F. (And that could easily be a wrong choice).
>>
>> M
>> --
>> Mark R V Murray
>>
>>
>
--
Mark R V Murray
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