Author: tychon
Date: Fri Mar 6 02:05:45 2015
New Revision: 279683
URL: https://svnweb.freebsd.org/changeset/base/279683
Log:
When ICW1 is issued the edge sense circuit is reset which means that
following an initialization a low-to-high transistion is necesary to
generate an interrupt.
Reviewed by: neel
Modified:
head/sys/amd64/vmm/io/vatpic.c
Modified: head/sys/amd64/vmm/io/vatpic.c
==============================================================================
--- head/sys/amd64/vmm/io/vatpic.c Fri Mar 6 00:24:21 2015
(r279682)
+++ head/sys/amd64/vmm/io/vatpic.c Fri Mar 6 02:05:45 2015
(r279683)
@@ -275,6 +275,7 @@ vatpic_icw1(struct vatpic *vatpic, struc
atpic->ready = false;
atpic->icw_num = 1;
+ atpic->request = 0;
atpic->mask = 0;
atpic->lowprio = 7;
atpic->rd_cmd_reg = 0;
_______________________________________________
[email protected] mailing list
http://lists.freebsd.org/mailman/listinfo/svn-src-head
To unsubscribe, send any mail to "[email protected]"
