Author: mmel Date: Wed Mar 16 13:01:48 2016 New Revision: 296936 URL: https://svnweb.freebsd.org/changeset/base/296936
Log: Import basic support for Nvidia Jetson TK1 board and tegra124 SoC. The following pheripherals are supported: UART, MMC, AHCI, EHCI, PCIe, I2C, PMIC, GPIO, CPU temperature and clock. Note: The PCIe driver is pure mash at this moment. It will be reworked immediately when both D5237 and D2579 enter the current tree. Added: head/sys/arm/conf/JETSON-TK1 (contents, props changed) head/sys/arm/conf/TEGRA124.common (contents, props changed) head/sys/arm/nvidia/ head/sys/arm/nvidia/as3722.c (contents, props changed) head/sys/arm/nvidia/as3722.h (contents, props changed) head/sys/arm/nvidia/as3722_gpio.c (contents, props changed) head/sys/arm/nvidia/as3722_regulators.c (contents, props changed) head/sys/arm/nvidia/as3722_rtc.c (contents, props changed) head/sys/arm/nvidia/tegra124/ head/sys/arm/nvidia/tegra124/files.tegra124 (contents, props changed) head/sys/arm/nvidia/tegra124/std.tegra124 (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_car.c (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_car.h (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_clk_per.c (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_clk_pll.c (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_clk_super.c (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_coretemp.c (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_cpufreq.c (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_machdep.c (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_mp.c (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_mp.h (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_pmc.c (contents, props changed) head/sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c (contents, props changed) head/sys/arm/nvidia/tegra_abpmisc.c (contents, props changed) head/sys/arm/nvidia/tegra_ahci.c (contents, props changed) head/sys/arm/nvidia/tegra_efuse.c (contents, props changed) head/sys/arm/nvidia/tegra_efuse.h (contents, props changed) head/sys/arm/nvidia/tegra_ehci.c (contents, props changed) head/sys/arm/nvidia/tegra_gpio.c (contents, props changed) head/sys/arm/nvidia/tegra_i2c.c (contents, props changed) head/sys/arm/nvidia/tegra_lic.c (contents, props changed) head/sys/arm/nvidia/tegra_pcie.c (contents, props changed) head/sys/arm/nvidia/tegra_pinmux.c (contents, props changed) head/sys/arm/nvidia/tegra_pmc.h (contents, props changed) head/sys/arm/nvidia/tegra_rtc.c (contents, props changed) head/sys/arm/nvidia/tegra_sdhci.c (contents, props changed) head/sys/arm/nvidia/tegra_soctherm.c (contents, props changed) head/sys/arm/nvidia/tegra_soctherm_if.m (contents, props changed) head/sys/arm/nvidia/tegra_uart.c (contents, props changed) head/sys/arm/nvidia/tegra_usbphy.c (contents, props changed) head/sys/boot/fdt/dts/arm/tegra124-jetson-tk1-fbsd.dts (contents, props changed) Added: head/sys/arm/conf/JETSON-TK1 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/conf/JETSON-TK1 Wed Mar 16 13:01:48 2016 (r296936) @@ -0,0 +1,37 @@ +# Kernel configuration for Jetson TK1 board +# +# For more information on this file, please read the config(5) manual page, +# and/or the handbook section on Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ + +#NO_UNIVERSE + +include "TEGRA124.common" +ident JETSON-TK1 + +# Flattened Device Tree +options FDT_DTB_STATIC +makeoptions FDT_DTS_FILE=tegra124-jetson-tk1-fbsd.dts + +makeoptions MODULES_OVERRIDE="" +#options BOOTVERBOSE +#options BOOTHOWTO=RB_SINGLE + +#options ROOTDEVNAME=\"ufs:mmcsd0s2a\" +options ROOTDEVNAME=\"ufs:ada0s1a\" + +# CTF doesn't works yet +makeoptions WITHOUT_CTF=1 Added: head/sys/arm/conf/TEGRA124.common ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/conf/TEGRA124.common Wed Mar 16 13:01:48 2016 (r296936) @@ -0,0 +1,154 @@ +# +# Kernel configuration for NVIDIA Tegra124 based boards. +# +# For more information on this file, please read the config(5) manual page, +# and/or the handbook section on Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ + +include "std.armv6" +include "../nvidia/tegra124/std.tegra124" + +options HZ=100 # Scheduling quantum is 10 milliseconds. +options SCHED_ULE # ULE scheduler +options PLATFORM # Platform based SoC +options PLATFORM_SMP +options SMP # Enable multiple cores + +# Debugging for use in -current +makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER +#options VERBOSE_SYSINIT # Enable verbose sysinit messages +options KDB # Enable kernel debugger support +# For minimum debugger support (stable branch) use: +#options KDB_TRACE # Print a stack trace for a panic +# For full debugger support use this instead: +options DDB # Enable the kernel debugger +options INVARIANTS # Enable calls of extra sanity checking +options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS +options WITNESS # Enable checks to detect deadlocks and cycles +options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed + +# Interrupt controller +device gic + +# ARM Generic Timer +device generic_timer + +# EXT_RESOURCES pseudo devices +options EXT_RESOURCES +device clk +device phy +device hwreset +device regulator + +# Pseudo devices. +device loop # Network loopback +device random # Entropy device +device vlan # 802.1Q VLAN support +#device tun # Packet tunnel. +device md # Memory "disks" +#device gif # IPv6 and IPv4 tunneling +#device firmware # firmware assist module +device ether # Ethernet support +device miibus # Required for ethernet +device bpf # Berkeley packet filter (required for DHCP) + + +# General-purpose input/output +device gpio +#device gpioled + +# I2C support +device iic +device iicbus +device icee + +# Serial (COM) ports +device uart # Multi-uart driver +device uart_ns8250 + +# MMC/SD/SDIO Card slot support +device sdhci # SD controller +device mmc # SD/MMC protocol +device mmcsd # SDCard disk device + +# ATA controllers +device ahci # AHCI-compatible SATA controllers + +# SCSI peripherals +device scbus # SCSI bus (required for ATA/SCSI) +device da # Direct Access (disks) +device cd # CD +device pass # Passthrough device (direct ATA/SCSI access) + +# USB support +options USB_HOST_ALIGN=64 # Align usb buffers to cache line size. +options USB_DEBUG # enable debug msgs +device ehci # EHCI USB interface +device usb # USB Bus (required) +device umass # Disks/Mass storage - Requires scbus and da +device uhid # "Human Interface Devices" +#device u3g # USB modems +device ukbd # Allow keyboard like HIDs to control console +device ums # USB mouse + +# USB Ethernet, requires miibus +#device aue # ADMtek USB Ethernet +#device axe # ASIX Electronics USB Ethernet +#device cdce # Generic USB over Ethernet +#device cue # CATC USB Ethernet +#device kue # Kawasaki LSI USB Ethernet +#device rue # RealTek RTL8150 USB Ethernet +#device udav # Davicom DM9601E USB + +# USB Wireless +#device rum # Ralink Technology RT2501USB wireless NICs + +# Wireless NIC cards +#device wlan # 802.11 support +#device wlan_wep # 802.11 WEP support +#device wlan_ccmp # 802.11 CCMP support +#device wlan_tkip # 802.11 TKIP support +#device wlan_amrr # AMRR transmit rate control algorithm + +# PCI +options NEW_PCIB +device pci + +# PCI Ethernet NICs that use the common MII bus controller code. +# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs! +device re # RealTek 8139C+/8169/8169S/8110S + +# DRM2 +#device fbd +#device vt +#device splash +#device kbdmux +#device drm2 + +# Sound +#device sound +#device snd_hda + +# Flattened Device Tree +options FDT # Configure using FDT/DTB data +device fdt_pinctrl + +# SoC-specific devices + +#device hwpmc +#options HWPMC_HOOKS Added: head/sys/arm/nvidia/as3722.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/nvidia/as3722.c Wed Mar 16 13:01:48 2016 (r296936) @@ -0,0 +1,411 @@ +/*- + * Copyright (c) 2016 Michal Meloun <m...@freebsd.org> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +/* + * AS3722 PMIC driver + */ + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/gpio.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <sys/malloc.h> +#include <sys/rman.h> +#include <sys/sx.h> + +#include <machine/bus.h> + +#include <dev/extres/regulator/regulator.h> +#include <dev/fdt/fdt_pinctrl.h> +#include <dev/gpio/gpiobusvar.h> +#include <dev/iicbus/iiconf.h> +#include <dev/iicbus/iicbus.h> +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> + +#include <gnu/dts/include/dt-bindings/mfd/as3722.h> + +#include "clock_if.h" +#include "regdev_if.h" + +#include "as3722.h" + +static struct ofw_compat_data compat_data[] = { + {"ams,as3722", 1}, + {NULL, 0}, +}; + +#define LOCK(_sc) sx_xlock(&(_sc)->lock) +#define UNLOCK(_sc) sx_xunlock(&(_sc)->lock) +#define LOCK_INIT(_sc) sx_init(&(_sc)->lock, "as3722") +#define LOCK_DESTROY(_sc) sx_destroy(&(_sc)->lock); +#define ASSERT_LOCKED(_sc) sx_assert(&(_sc)->lock, SA_XLOCKED); +#define ASSERT_UNLOCKED(_sc) sx_assert(&(_sc)->lock, SA_UNLOCKED); + +#define AS3722_DEVICE_ID 0x0C + +/* + * Raw register access function. + */ +int +as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val) +{ + uint8_t addr; + int rv; + struct iic_msg msgs[2] = { + {0, IIC_M_WR, 1, &addr}, + {0, IIC_M_RD, 1, val}, + }; + + msgs[0].slave = sc->bus_addr; + msgs[1].slave = sc->bus_addr; + addr = reg; + + rv = iicbus_transfer(sc->dev, msgs, 2); + if (rv != 0) { + device_printf(sc->dev, + "Error when reading reg 0x%02X, rv: %d\n", reg, rv); + return (EIO); + } + + return (0); +} + +int as3722_read_buf(struct as3722_softc *sc, uint8_t reg, uint8_t *buf, + size_t size) +{ + uint8_t addr; + int rv; + struct iic_msg msgs[2] = { + {0, IIC_M_WR, 1, &addr}, + {0, IIC_M_RD, size, buf}, + }; + + msgs[0].slave = sc->bus_addr; + msgs[1].slave = sc->bus_addr; + addr = reg; + + rv = iicbus_transfer(sc->dev, msgs, 2); + if (rv != 0) { + device_printf(sc->dev, + "Error when reading reg 0x%02X, rv: %d\n", reg, rv); + return (EIO); + } + + return (0); +} + +int +as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val) +{ + uint8_t data[2]; + int rv; + + struct iic_msg msgs[1] = { + {0, IIC_M_WR, 2, data}, + }; + + msgs[0].slave = sc->bus_addr; + data[0] = reg; + data[1] = val; + + rv = iicbus_transfer(sc->dev, msgs, 1); + if (rv != 0) { + device_printf(sc->dev, + "Error when writing reg 0x%02X, rv: %d\n", reg, rv); + return (EIO); + } + return (0); +} + +int as3722_write_buf(struct as3722_softc *sc, uint8_t reg, uint8_t *buf, + size_t size) +{ + uint8_t data[1]; + int rv; + struct iic_msg msgs[2] = { + {0, IIC_M_WR, 1, data}, + {0, IIC_M_WR | IIC_M_NOSTART, size, buf}, + }; + + msgs[0].slave = sc->bus_addr; + msgs[1].slave = sc->bus_addr; + data[0] = reg; + + rv = iicbus_transfer(sc->dev, msgs, 2); + if (rv != 0) { + device_printf(sc->dev, + "Error when writing reg 0x%02X, rv: %d\n", reg, rv); + return (EIO); + } + return (0); +} + +int +as3722_modify(struct as3722_softc *sc, uint8_t reg, uint8_t clear, uint8_t set) +{ + uint8_t val; + int rv; + + rv = as3722_read(sc, reg, &val); + if (rv != 0) + return (rv); + + val &= ~clear; + val |= set; + + rv = as3722_write(sc, reg, val); + if (rv != 0) + return (rv); + + return (0); +} + +static int +as3722_get_version(struct as3722_softc *sc) +{ + uint8_t reg; + int rv; + + /* Verify AS3722 ID and version. */ + rv = RD1(sc, AS3722_ASIC_ID1, ®); + if (rv != 0) + return (ENXIO); + + if (reg != AS3722_DEVICE_ID) { + device_printf(sc->dev, "Invalid chip ID is 0x%x\n", reg); + return (ENXIO); + } + + rv = RD1(sc, AS3722_ASIC_ID2, &sc->chip_rev); + if (rv != 0) + return (ENXIO); + + if (bootverbose) + device_printf(sc->dev, "AS3722 rev: 0x%x\n", sc->chip_rev); + return (0); +} + +static int +as3722_init(struct as3722_softc *sc) +{ + uint32_t reg; + int rv; + + reg = 0; + if (sc->int_pullup) + reg |= AS3722_INT_PULL_UP; + if (sc->i2c_pullup) + reg |= AS3722_I2C_PULL_UP; + + rv = RM1(sc, AS3722_IO_VOLTAGE, + AS3722_INT_PULL_UP | AS3722_I2C_PULL_UP, reg); + if (rv != 0) + return (ENXIO); + + /* mask interrupts */ + rv = WR1(sc, AS3722_INTERRUPT_MASK1, 0); + if (rv != 0) + return (ENXIO); + rv = WR1(sc, AS3722_INTERRUPT_MASK2, 0); + if (rv != 0) + return (ENXIO); + rv = WR1(sc, AS3722_INTERRUPT_MASK3, 0); + if (rv != 0) + return (ENXIO); + rv = WR1(sc, AS3722_INTERRUPT_MASK4, 0); + if (rv != 0) + return (ENXIO); + return (0); +} + +static int +as3722_parse_fdt(struct as3722_softc *sc, phandle_t node) +{ + + sc->int_pullup = + OF_hasprop(node, "ams,enable-internal-int-pullup") ? 1 : 0; + sc->i2c_pullup = + OF_hasprop(node, "ams,enable-internal-i2c-pullup") ? 1 : 0; + return 0; +} + +static void +as3722_intr(void *arg) +{ + struct as3722_softc *sc; + + sc = (struct as3722_softc *)arg; + /* XXX Finish temperature alarms. */ +} + +static int +as3722_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) + return (ENXIO); + + device_set_desc(dev, "AS3722 PMIC"); + return (BUS_PROBE_DEFAULT); +} + +static int +as3722_attach(device_t dev) +{ + struct as3722_softc *sc; + const char *dname; + int dunit, rv, rid; + phandle_t node; + + sc = device_get_softc(dev); + sc->dev = dev; + sc->bus_addr = iicbus_get_addr(dev); + node = ofw_bus_get_node(sc->dev); + dname = device_get_name(dev); + dunit = device_get_unit(dev); + rv = 0; + LOCK_INIT(sc); + + rid = 0; + sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, + RF_ACTIVE); + if (sc->irq_res == NULL) { + device_printf(dev, "Cannot allocate interrupt.\n"); + rv = ENXIO; + goto fail; + } + + rv = as3722_parse_fdt(sc, node); + if (rv != 0) + goto fail; + rv = as3722_get_version(sc); + if (rv != 0) + goto fail; + rv = as3722_init(sc); + if (rv != 0) + goto fail; + rv = as3722_regulator_attach(sc, node); + if (rv != 0) + goto fail; + rv = as3722_gpio_attach(sc, node); + if (rv != 0) + goto fail; + rv = as3722_rtc_attach(sc, node); + if (rv != 0) + goto fail; + + fdt_pinctrl_register(dev, NULL); + fdt_pinctrl_configure_by_name(dev, "default"); + + /* Setup interrupt. */ + rv = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE, + NULL, as3722_intr, sc, &sc->irq_h); + if (rv) { + device_printf(dev, "Cannot setup interrupt.\n"); + goto fail; + } + return (bus_generic_attach(dev)); + +fail: + if (sc->irq_h != NULL) + bus_teardown_intr(dev, sc->irq_res, sc->irq_h); + if (sc->irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res); + LOCK_DESTROY(sc); + return (rv); +} + +static int +as3722_detach(device_t dev) +{ + struct as3722_softc *sc; + + sc = device_get_softc(dev); + if (sc->irq_h != NULL) + bus_teardown_intr(dev, sc->irq_res, sc->irq_h); + if (sc->irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res); + LOCK_DESTROY(sc); + + return (bus_generic_detach(dev)); +} + +static phandle_t +as3722_gpio_get_node(device_t bus, device_t dev) +{ + + /* We only have one child, the GPIO bus, which needs our own node. */ + return (ofw_bus_get_node(bus)); +} + +static device_method_t as3722_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, as3722_probe), + DEVMETHOD(device_attach, as3722_attach), + DEVMETHOD(device_detach, as3722_detach), + + /* Regdev interface */ + DEVMETHOD(regdev_map, as3722_regulator_map), + + /* RTC interface */ + DEVMETHOD(clock_gettime, as3722_rtc_gettime), + DEVMETHOD(clock_settime, as3722_rtc_settime), + + /* GPIO protocol interface */ + DEVMETHOD(gpio_get_bus, as3722_gpio_get_bus), + DEVMETHOD(gpio_pin_max, as3722_gpio_pin_max), + DEVMETHOD(gpio_pin_getname, as3722_gpio_pin_getname), + DEVMETHOD(gpio_pin_getflags, as3722_gpio_pin_getflags), + DEVMETHOD(gpio_pin_getcaps, as3722_gpio_pin_getcaps), + DEVMETHOD(gpio_pin_setflags, as3722_gpio_pin_setflags), + DEVMETHOD(gpio_pin_get, as3722_gpio_pin_get), + DEVMETHOD(gpio_pin_set, as3722_gpio_pin_set), + DEVMETHOD(gpio_pin_toggle, as3722_gpio_pin_toggle), + DEVMETHOD(gpio_map_gpios, as3722_gpio_map_gpios), + + /* fdt_pinctrl interface */ + DEVMETHOD(fdt_pinctrl_configure, as3722_pinmux_configure), + + /* ofw_bus interface */ + DEVMETHOD(ofw_bus_get_node, as3722_gpio_get_node), + + DEVMETHOD_END +}; + +static devclass_t as3722_devclass; +DEFINE_CLASS_0(gpio, as3722_driver, as3722_methods, + sizeof(struct as3722_softc)); +EARLY_DRIVER_MODULE(as3722, iicbus, as3722_driver, as3722_devclass, + 0, 0, 74); Added: head/sys/arm/nvidia/as3722.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/nvidia/as3722.h Wed Mar 16 13:01:48 2016 (r296936) @@ -0,0 +1,323 @@ +/*- + * Copyright (c) 2016 Michal Meloun <m...@freebsd.org> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _AS3722_H_ + +#include <sys/clock.h> + +#define AS3722_SD0_VOLTAGE 0x00 +#define AS3722_SD_VSEL_MASK 0x7F /* For all SD */ +#define AS3722_SD0_VSEL_MIN 0x01 +#define AS3722_SD0_VSEL_MAX 0x5A +#define AS3722_SD0_VSEL_LOW_VOL_MAX 0x6E + +#define AS3722_SD1_VOLTAGE 0x01 +#define AS3722_SD2_VOLTAGE 0x02 +#define AS3722_SD2_VSEL_MIN 0x01 +#define AS3722_SD2_VSEL_MAX 0x7F +#define AS3722_SD3_VOLTAGE 0x03 +#define AS3722_SD4_VOLTAGE 0x04 +#define AS3722_SD5_VOLTAGE 0x05 +#define AS3722_SD6_VOLTAGE 0x06 +#define AS3722_GPIO0_CONTROL 0x08 +#define AS3722_GPIO_INVERT 0x80 +#define AS3722_GPIO_IOSF_MASK 0x0F +#define AS3722_GPIO_IOSF_SHIFT 3 +#define AS3722_GPIO_MODE_MASK 0x07 +#define AS3722_GPIO_MODE_SHIFT 0 + +#define AS3722_GPIO1_CONTROL 0x09 +#define AS3722_GPIO2_CONTROL 0x0A +#define AS3722_GPIO3_CONTROL 0x0B +#define AS3722_GPIO4_CONTROL 0x0C +#define AS3722_GPIO5_CONTROL 0x0D +#define AS3722_GPIO6_CONTROL 0x0E +#define AS3722_GPIO7_CONTROL 0x0F +#define AS3722_LDO0_VOLTAGE 0x10 +#define AS3722_LDO0_VSEL_MASK 0x1F +#define AS3722_LDO0_VSEL_MIN 0x01 +#define AS3722_LDO0_VSEL_MAX 0x12 +#define AS3722_LDO0_NUM_VOLT 0x12 + +#define AS3722_LDO1_VOLTAGE 0x11 +#define AS3722_LDO_VSEL_MASK 0x7F +#define AS3722_LDO_VSEL_MIN 0x01 +#define AS3722_LDO_VSEL_MAX 0x7F +#define AS3722_LDO_VSEL_DNU_MIN 0x25 +#define AS3722_LDO_VSEL_DNU_MAX 0x3F +#define AS3722_LDO_NUM_VOLT 0x80 + +#define AS3722_LDO2_VOLTAGE 0x12 +#define AS3722_LDO3_VOLTAGE 0x13 +#define AS3722_LDO3_VSEL_MASK 0x3F +#define AS3722_LDO3_VSEL_MIN 0x01 +#define AS3722_LDO3_VSEL_MAX 0x2D +#define AS3722_LDO3_NUM_VOLT 0x2D +#define AS3722_LDO3_MODE_MASK (0x3 << 6) +#define AS3722_LDO3_MODE_GET(x) (((x) >> 6) & 0x3) +#define AS3722_LDO3_MODE(x) (((x) & 0x3) << 6) +#define AS3722_LDO3_MODE_PMOS AS3722_LDO3_MODE(0) +#define AS3722_LDO3_MODE_PMOS_TRACKING AS3722_LDO3_MODE(1) +#define AS3722_LDO3_MODE_NMOS AS3722_LDO3_MODE(2) +#define AS3722_LDO3_MODE_SWITCH AS3722_LDO3_MODE(3) + +#define AS3722_LDO4_VOLTAGE 0x14 +#define AS3722_LDO5_VOLTAGE 0x15 +#define AS3722_LDO6_VOLTAGE 0x16 +#define AS3722_LDO6_SEL_BYPASS 0x3F +#define AS3722_LDO7_VOLTAGE 0x17 +#define AS3722_LDO9_VOLTAGE 0x19 +#define AS3722_LDO10_VOLTAGE 0x1A +#define AS3722_LDO11_VOLTAGE 0x1B +#define AS3722_LDO3_SETTINGS 0x1D +#define AS3722_GPIO_DEB1 0x1E +#define AS3722_GPIO_DEB2 0x1F +#define AS3722_GPIO_SIGNAL_OUT 0x20 +#define AS3722_GPIO_SIGNAL_IN 0x21 +#define AS3722_REG_SEQU_MOD1 0x22 +#define AS3722_REG_SEQU_MOD2 0x23 +#define AS3722_REG_SEQU_MOD3 0x24 +#define AS3722_SD_PHSW_CTRL 0x27 +#define AS3722_SD_PHSW_STATUS 0x28 + +#define AS3722_SD0_CONTROL 0x29 +#define AS3722_SD0_MODE_FAST (1 << 4) + +#define AS3722_SD1_CONTROL 0x2A +#define AS3722_SD1_MODE_FAST (1 << 4) + +#define AS3722_SDMPH_CONTROL 0x2B +#define AS3722_SD23_CONTROL 0x2C +#define AS3722_SD3_MODE_FAST (1 << 6) +#define AS3722_SD2_MODE_FAST (1 << 2) + +#define AS3722_SD4_CONTROL 0x2D +#define AS3722_SD4_MODE_FAST (1 << 2) + +#define AS3722_SD5_CONTROL 0x2E +#define AS3722_SD5_MODE_FAST (1 << 2) + +#define AS3722_SD6_CONTROL 0x2F +#define AS3722_SD6_MODE_FAST (1 << 4) + +#define AS3722_SD_DVM 0x30 +#define AS3722_RESET_REASON 0x31 +#define AS3722_BATTERY_VOLTAGE_MONITOR 0x32 +#define AS3722_STARTUP_CONTROL 0x33 +#define AS3722_RESET_TIMER 0x34 +#define AS3722_REFERENCE_CONTROL 0x35 +#define AS3722_RESET_CONTROL 0x36 +#define AS3722_OVERTEMPERATURE_CONTROL 0x37 +#define AS3722_WATCHDOG_CONTROL 0x38 +#define AS3722_REG_STANDBY_MOD1 0x39 +#define AS3722_REG_STANDBY_MOD2 0x3A +#define AS3722_REG_STANDBY_MOD3 0x3B +#define AS3722_ENABLE_CTRL1 0x3C +#define AS3722_SD3_EXT_ENABLE_MASK 0xC0 +#define AS3722_SD2_EXT_ENABLE_MASK 0x30 +#define AS3722_SD1_EXT_ENABLE_MASK 0x0C +#define AS3722_SD0_EXT_ENABLE_MASK 0x03 + +#define AS3722_ENABLE_CTRL2 0x3D +#define AS3722_SD6_EXT_ENABLE_MASK 0x30 +#define AS3722_SD5_EXT_ENABLE_MASK 0x0C +#define AS3722_SD4_EXT_ENABLE_MASK 0x03 + +#define AS3722_ENABLE_CTRL3 0x3E +#define AS3722_LDO3_EXT_ENABLE_MASK 0xC0 +#define AS3722_LDO2_EXT_ENABLE_MASK 0x30 +#define AS3722_LDO1_EXT_ENABLE_MASK 0x0C +#define AS3722_LDO0_EXT_ENABLE_MASK 0x03 + +#define AS3722_ENABLE_CTRL4 0x3F +#define AS3722_LDO7_EXT_ENABLE_MASK 0xC0 +#define AS3722_LDO6_EXT_ENABLE_MASK 0x30 +#define AS3722_LDO5_EXT_ENABLE_MASK 0x0C +#define AS3722_LDO4_EXT_ENABLE_MASK 0x03 + +#define AS3722_ENABLE_CTRL5 0x40 +#define AS3722_LDO11_EXT_ENABLE_MASK 0xC0 +#define AS3722_LDO10_EXT_ENABLE_MASK 0x30 +#define AS3722_LDO9_EXT_ENABLE_MASK 0x0C + +#define AS3722_PWM_CONTROL_L 0x41 +#define AS3722_PWM_CONTROL_H 0x42 +#define AS3722_WATCHDOG_TIMER 0x46 +#define AS3722_WATCHDOG_SOFTWARE_SIGNAL 0x48 +#define AS3722_IO_VOLTAGE 0x49 +#define AS3722_I2C_PULL_UP (1 << 4) +#define AS3722_INT_PULL_UP (1 << 5) + +#define AS3722_BATTERY_VOLTAGE_MONITOR2 0x4A +#define AS3722_SD_CONTROL 0x4D +#define AS3722_SDN_CTRL(x) (1 << (x)) + +#define AS3722_LDO_CONTROL0 0x4E +#define AS3722_LDO7_CTRL (1 << 7) +#define AS3722_LDO6_CTRL (1 << 6) +#define AS3722_LDO5_CTRL (1 << 5) +#define AS3722_LDO4_CTRL (1 << 4) +#define AS3722_LDO3_CTRL (1 << 3) +#define AS3722_LDO2_CTRL (1 << 2) +#define AS3722_LDO1_CTRL (1 << 1) +#define AS3722_LDO0_CTRL (1 << 0) + +#define AS3722_LDO_CONTROL1 0x4F +#define AS3722_LDO11_CTRL (1 << 3) +#define AS3722_LDO10_CTRL (1 << 2) +#define AS3722_LDO9_CTRL (1 << 1) + +#define AS3722_SD0_PROTECT 0x50 +#define AS3722_SD6_PROTECT 0x51 +#define AS3722_PWM_VCONTROL1 0x52 +#define AS3722_PWM_VCONTROL2 0x53 +#define AS3722_PWM_VCONTROL3 0x54 +#define AS3722_PWM_VCONTROL4 0x55 +#define AS3722_BB_CHARGER 0x57 +#define AS3722_CTRL_SEQU1 0x58 +#define AS3722_CTRL_SEQU2 0x59 +#define AS3722_OV_CURRENT 0x5A +#define AS3722_OV_CURRENT_DEB 0x5B +#define AS3722_SDLV_DEB 0x5C +#define AS3722_OC_PG_CTRL 0x5D +#define AS3722_OC_PG_CTRL2 0x5E +#define AS3722_CTRL_STATUS 0x5F +#define AS3722_RTC_CONTROL 0x60 +#define AS3722_RTC_AM_PM_MODE (1 << 7) +#define AS3722_RTC_CLK32K_OUT_EN (1 << 5) +#define AS3722_RTC_IRQ_MODE (1 << 3) +#define AS3722_RTC_ON (1 << 2) +#define AS3722_RTC_ALARM_WAKEUP_EN (1 << 1) +#define AS3722_RTC_REP_WAKEUP_EN (1 << 0) + +#define AS3722_RTC_SECOND 0x61 +#define AS3722_RTC_MINUTE 0x62 +#define AS3722_RTC_HOUR 0x63 +#define AS3722_RTC_DAY 0x64 +#define AS3722_RTC_MONTH 0x65 +#define AS3722_RTC_YEAR 0x66 +#define AS3722_RTC_ALARM_SECOND 0x67 +#define AS3722_RTC_ALARM_MINUTE 0x68 +#define AS3722_RTC_ALARM_HOUR 0x69 +#define AS3722_RTC_ALARM_DAY 0x6A +#define AS3722_RTC_ALARM_MONTH 0x6B +#define AS3722_RTC_ALARM_YEAR 0x6C +#define AS3722_SRAM 0x6D +#define AS3722_RTC_ACCESS 0x6F +#define AS3722_REG_STATUS 0x73 +#define AS3722_INTERRUPT_MASK1 0x74 +#define AS3722_INTERRUPT_MASK2 0x75 +#define AS3722_INTERRUPT_MASK3 0x76 +#define AS3722_INTERRUPT_MASK4 0x77 +#define AS3722_INTERRUPT_STATUS1 0x78 +#define AS3722_INTERRUPT_STATUS2 0x79 +#define AS3722_INTERRUPT_STATUS3 0x7A +#define AS3722_INTERRUPT_STATUS4 0x7B +#define AS3722_TEMP_STATUS 0x7D +#define AS3722_ADC0_CONTROL 0x80 +#define AS3722_ADC1_CONTROL 0x81 +#define AS3722_ADC0_MSB_RESULT 0x82 +#define AS3722_ADC0_LSB_RESULT 0x83 +#define AS3722_ADC1_MSB_RESULT 0x84 +#define AS3722_ADC1_LSB_RESULT 0x85 +#define AS3722_ADC1_THRESHOLD_HI_MSB 0x86 +#define AS3722_ADC1_THRESHOLD_HI_LSB 0x87 +#define AS3722_ADC1_THRESHOLD_LO_MSB 0x88 +#define AS3722_ADC1_THRESHOLD_LO_LSB 0x89 +#define AS3722_ADC_CONFIGURATION 0x8A +#define AS3722_ASIC_ID1 0x90 +#define AS3722_ASIC_ID2 0x91 +#define AS3722_LOCK 0x9E +#define AS3722_FUSE7 0x9E +#define AS3722_FUSE7_SD0_LOW_VOLTAGE (1 << 4) + +struct as3722_reg_sc; +struct as3722_gpio_pin; + +struct as3722_softc { + device_t dev; + struct sx lock; + int bus_addr; + struct resource *irq_res; + void *irq_h; + + uint8_t chip_rev; + int int_pullup; + int i2c_pullup; + + /* Regulators. */ + struct as3722_reg_sc **regs; + int nregs; + + /* GPIO */ + device_t gpio_busdev; + struct as3722_gpio_pin **gpio_pins; + int gpio_npins; + struct sx gpio_lock; + +}; + +#define RD1(sc, reg, val) as3722_read(sc, reg, val) +#define WR1(sc, reg, val) as3722_write(sc, reg, val) +#define RM1(sc, reg, clr, set) as3722_modify(sc, reg, clr, set) + +int as3722_read(struct as3722_softc *sc, uint8_t reg, uint8_t *val); +int as3722_write(struct as3722_softc *sc, uint8_t reg, uint8_t val); +int as3722_modify(struct as3722_softc *sc, uint8_t reg, uint8_t clear, + uint8_t set); +int as3722_read_buf(struct as3722_softc *sc, uint8_t reg, uint8_t *buf, + size_t size); +int as3722_write_buf(struct as3722_softc *sc, uint8_t reg, uint8_t *buf, + size_t size); + +/* Regulators */ +int as3722_regulator_attach(struct as3722_softc *sc, phandle_t node); +int as3722_regulator_map(device_t dev, phandle_t xref, int ncells, + pcell_t *cells, int *num); + +/* RTC */ +int as3722_rtc_attach(struct as3722_softc *sc, phandle_t node); +int as3722_rtc_gettime(device_t dev, struct timespec *ts); +int as3722_rtc_settime(device_t dev, struct timespec *ts); + +/* GPIO */ +device_t as3722_gpio_get_bus(device_t dev); +int as3722_gpio_pin_max(device_t dev, int *maxpin); +int as3722_gpio_pin_getname(device_t dev, uint32_t pin, char *name); +int as3722_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags); +int as3722_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps); +int as3722_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags); +int as3722_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value); +int as3722_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val); +int as3722_gpio_pin_toggle(device_t dev, uint32_t pin); +int as3722_gpio_map_gpios(device_t dev, phandle_t pdev, phandle_t gparent, + int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags); +int as3722_gpio_attach(struct as3722_softc *sc, phandle_t node); +int as3722_pinmux_configure(device_t dev, phandle_t cfgxref); + +#endif /* _AS3722_H_ */ Added: head/sys/arm/nvidia/as3722_gpio.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/nvidia/as3722_gpio.c Wed Mar 16 13:01:48 2016 (r296936) @@ -0,0 +1,577 @@ +/*- + * Copyright (c) 2016 Michal Meloun <m...@freebsd.org> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/gpio.h> +#include <sys/kernel.h> +#include <sys/malloc.h> +#include <sys/sx.h> + +#include <machine/bus.h> + +#include <dev/fdt/fdt_common.h> +#include <dev/gpio/gpiobusvar.h> + +#include "as3722.h" + +MALLOC_DEFINE(M_AS3722_GPIO, "AS3722 gpio", "AS3722 GPIO"); + +/* AS3722_GPIOx_CONTROL MODE and IOSF definition. */ +#define AS3722_IOSF_GPIO 0x00 +#define AS3722_IOSF_INTERRUPT_OUT 0x01 +#define AS3722_IOSF_VSUP_VBAT_LOW_UNDEBOUNCE_OUT 0x02 +#define AS3722_IOSF_GPIO_IN_INTERRUPT 0x03 +#define AS3722_IOSF_PWM_IN 0x04 +#define AS3722_IOSF_VOLTAGE_IN_STANDBY 0x05 +#define AS3722_IOSF_OC_PG_SD0 0x06 +#define AS3722_IOSF_POWERGOOD_OUT 0x07 +#define AS3722_IOSF_CLK32K_OUT 0x08 +#define AS3722_IOSF_WATCHDOG_IN 0x09 +#define AS3722_IOSF_SOFT_RESET_IN 0x0b +#define AS3722_IOSF_PWM_OUT 0x0c +#define AS3722_IOSF_VSUP_VBAT_LOW_DEBOUNCE_OUT 0x0d *** DIFF OUTPUT TRUNCATED AT 1000 LINES *** _______________________________________________ svn-src-head@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/svn-src-head To unsubscribe, send any mail to "svn-src-head-unsubscr...@freebsd.org"
