Author: mav
Date: Thu Jul 14 14:35:25 2016
New Revision: 302843
URL: https://svnweb.freebsd.org/changeset/base/302843
Log:
Increase number of I/O APIC pins from 24 to 32 to give PCI up to 16 IRQs.
Move HPET to the top of the supported 0-31 range.
Proposed by: jhb@, grehan@
Modified:
head/sys/amd64/vmm/io/vhpet.c
head/sys/amd64/vmm/io/vioapic.c
Modified: head/sys/amd64/vmm/io/vhpet.c
==============================================================================
--- head/sys/amd64/vmm/io/vhpet.c Thu Jul 14 14:16:20 2016
(r302842)
+++ head/sys/amd64/vmm/io/vhpet.c Thu Jul 14 14:35:25 2016
(r302843)
@@ -715,8 +715,10 @@ vhpet_init(struct vm *vm)
vhpet->freq_sbt = bttosbt(bt);
pincount = vioapic_pincount(vm);
- if (pincount >= 24)
- allowed_irqs = 0x00f00000; /* irqs 20, 21, 22 and 23 */
+ if (pincount >= 32)
+ allowed_irqs = 0xff000000; /* irqs 24-31 */
+ else if (pincount >= 20)
+ allowed_irqs = 0xf << (pincount - 4); /* 4 upper irqs */
else
allowed_irqs = 0;
Modified: head/sys/amd64/vmm/io/vioapic.c
==============================================================================
--- head/sys/amd64/vmm/io/vioapic.c Thu Jul 14 14:16:20 2016
(r302842)
+++ head/sys/amd64/vmm/io/vioapic.c Thu Jul 14 14:35:25 2016
(r302843)
@@ -49,7 +49,7 @@ __FBSDID("$FreeBSD$");
#define IOREGSEL 0x00
#define IOWIN 0x10
-#define REDIR_ENTRIES 24
+#define REDIR_ENTRIES 32
#define RTBL_RO_BITS ((uint64_t)(IOART_REM_IRR | IOART_DELIVS))
struct vioapic {
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