Author: jmcneill
Date: Wed Aug 31 16:56:54 2016
New Revision: 305134
URL: https://svnweb.freebsd.org/changeset/base/305134

Log:
  Add Allwinner A64 (sun50i) and Pine64 dts files.
  
  Reviewed by:          andrew, imp, manu, wca
  Differential Revision:        https://reviews.freebsd.org/D7169

Added:
  head/sys/boot/fdt/dts/arm64/
  head/sys/boot/fdt/dts/arm64/Makefile   (contents, props changed)
  head/sys/boot/fdt/dts/arm64/a64.dtsi   (contents, props changed)
  head/sys/boot/fdt/dts/arm64/pine64_plus.dts   (contents, props changed)
  head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-common.dtsi   (contents, props 
changed)
  head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-plus.dts   (contents, props 
changed)
  head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64.dts   (contents, props changed)
  head/sys/boot/fdt/dts/arm64/sun50i-a64.dtsi   (contents, props changed)
Modified:
  head/sys/boot/fdt/dts/Makefile

Modified: head/sys/boot/fdt/dts/Makefile
==============================================================================
--- head/sys/boot/fdt/dts/Makefile      Wed Aug 31 15:47:58 2016        
(r305133)
+++ head/sys/boot/fdt/dts/Makefile      Wed Aug 31 16:56:54 2016        
(r305134)
@@ -1,5 +1,5 @@
 # $FreeBSD$
 
-SUBDIR=arm mips powerpc
+SUBDIR=arm arm64 mips powerpc
 
 .include <bsd.subdir.mk>

Added: head/sys/boot/fdt/dts/arm64/Makefile
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm64/Makefile        Wed Aug 31 16:56:54 2016        
(r305134)
@@ -0,0 +1,7 @@
+# $FreeBSD$
+
+DTS!=ls *.dts
+
+all: test-dts
+
+.include <bsd.init.mk>

Added: head/sys/boot/fdt/dts/arm64/a64.dtsi
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm64/a64.dtsi        Wed Aug 31 16:56:54 2016        
(r305134)
@@ -0,0 +1,151 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/ {
+       clocks {
+               pll_hsic: clk@01c20044 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun50i-a64-pllhsic-clk";
+                       reg = <0x01c20044 0x4>;
+                       clocks = <&osc24M>;
+                       clock-output-names = "pll_hsic";
+               };
+
+               usb_clk: clk@01c200cc {
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       compatible = "allwinner,sun8i-a83t-usb-clk";
+                       reg = <0x01c200cc 0x4>;
+                       clocks = <&osc24M>, <&pll_hsic>;
+                       clock-indices = <8>, <9>,
+                                       <10>, <11>,
+                                       <16>, <17>;
+                       clock-output-names = "usb_phy0", "usb_phy1",
+                                            "usb_hsic_pll", "usb_hsic_12m",
+                                            "usb_otg_ohci", "usb_ohci0";
+               };
+       };
+
+       soc {
+               watchdog: watchdog@01c20ca0 {
+                       compatible = "allwinner,sun6i-a31-wdt";
+                       reg = <0x01c20ca0 0x20>;
+                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&osc24M>;
+               };
+
+               nmi_intc: interrupt-controller@01f00c0c {
+                       compatible = "allwinner,sun6i-a31-sc-nmi";
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+                       reg = <0x01f00c0c 0x38>;
+                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               r_rsb: i2c@01f03400 {
+                       compatible = "allwinner,sun8i-a23-rsb";
+                       reg = <0x01f03400 0x400>;
+                       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-frequency = <3000000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&r_rsb_pins>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               usbphy: phy@01c19400 {
+                       compatible = "allwinner,sun50i-a64-usb-phy";
+                       reg = <0x01c19400 0x24 0x01c1a800 0x4 0x01c1b800 0x4>;
+                       reg-names = "phy_ctrl", "pmu1", "pmu2";
+                       clocks = <&usb_clk 8>,
+                                <&usb_clk 9>;
+                       clock-names = "usb0_phy",
+                                     "usb1_phy";
+                       resets = <&usb_clk 0>,
+                                <&usb_clk 1>;
+                       reset-names = "usb0_reset",
+                                     "usb1_reset";
+                       status = "disabled";
+                       #phy-cells = <1>;
+               };
+
+               ohci0: usb@01c1a400 {
+                       compatible = "generic-ohci";
+                       reg = <0x01c1a400 0x100>;
+                       interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&bus_gates 28>, <&usb_clk 16>, <&usb_clk 17>;
+                       resets = <&ahb_rst 28>;
+                       phys = <&usbphy 1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ehci0: usb@01c1a000 {
+                       compatible = "allwinner,sun8i-a83t-ehci", 
"generic-ehci";
+                       reg = <0x01c1a000 0x100>;
+                       interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&bus_gates 24>;
+                       resets = <&ahb_rst 24>;
+                       phys = <&usbphy 1>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ohci1: usb@01c1b400 {
+                       compatible = "generic-ohci";
+                       reg = <0x01c1b400 0x100>;
+                       interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&bus_gates 29>, <&usb_clk 16>, <&usb_clk 17>;
+                       resets = <&ahb_rst 29>;
+                       phys = <&usbphy 2>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+
+               ehci1: usb@01c1b000 {
+                       compatible = "allwinner,sun8i-a83t-ehci", 
"generic-ehci";
+                       reg = <0x01c1b000 0x100>;
+                       interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&bus_gates 25>;
+                       resets = <&ahb_rst 25>;
+                       phys = <&usbphy 2>;
+                       phy-names = "usb";
+                       status = "disabled";
+               };
+       };
+};
+
+&pio {
+       r_rsb_pins: r_rsb {
+               allwinner,pins = "PL0", "PL1";
+               allwinner,function = "s_rsb";
+               allwinner,drive = <SUN4I_PINCTRL_20_MA>;
+               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+       };
+};

Added: head/sys/boot/fdt/dts/arm64/pine64_plus.dts
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm64/pine64_plus.dts Wed Aug 31 16:56:54 2016        
(r305134)
@@ -0,0 +1,89 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include "sun50i-a64-pine64-plus.dts"
+#include "a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+&pio {
+       emac_phy_reset_pin_pine64_plus: emac_phy_reset_pin@0 {
+               allwinner,pins = "PD14";
+               allwinner,function = "gpio_out";
+               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+       };
+};
+
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_pins>, <&emac_phy_reset_pin_pine64_plus>;
+       phy-supply = <&reg_dc1dc>;
+       allwinner,reset-gpio = <&pio 3 14 GPIO_ACTIVE_HIGH>;
+       allwinner,reset-active-low;
+       allwinner,reset-delays-us = <0 10000 30000>;
+};
+
+&r_rsb {
+       status = "okay";
+
+       axp81x: pmic@3a3 {
+               compatible = "x-powers,axp813";
+               reg = <0x3a3>;
+               interrupt-parent = <&nmi_intc>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               gpio-controller;
+               #gpio-cells = <1>;
+
+               regulators {
+                       reg_dc1dc: dc1sw {
+                               regulator-name = "dc1sw";
+                       };
+               };
+       };
+};
+
+&usbphy {
+       status = "okay";
+};
+
+&ehci0 {
+       status = "okay";
+};
+
+&ohci0 {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};

Added: head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-common.dtsi
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-common.dtsi   Wed Aug 31 
16:56:54 2016        (r305134)
@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+#include "sun50i-a64.dtsi"
+
+/ {
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       soc {
+               reg_vcc3v3: vcc3v3 {
+                       compatible = "regulator-fixed";
+                       regulator-name = "vcc3v3";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+               };
+       };
+};
+
+&mmc0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>;
+       vmmc-supply = <&reg_vcc3v3>;
+       cd-gpios = <&pio 5 6 0>;
+       cd-inverted;
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins_a>;
+       status = "okay";
+};
+
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c1_pins>;
+       status = "okay";
+};

Added: head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-plus.dts
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-plus.dts      Wed Aug 31 
16:56:54 2016        (r305134)
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-pine64-common.dtsi"
+
+/ {
+       model = "Pine64+";
+       compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       /* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */
+       memory {
+               reg = <0x40000000 0x40000000>;
+       };
+};
+
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_pins>;
+       phy-mode = "rgmii";
+       phy = <&phy1>;
+       status = "okay";
+
+       phy1: ethernet-phy@1 {
+               reg = <1>;
+       };
+};

Added: head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64.dts
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64.dts   Wed Aug 31 16:56:54 
2016        (r305134)
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-pine64-common.dtsi"
+
+/ {
+       model = "Pine64";
+       compatible = "pine64,pine64", "allwinner,sun50i-a64";
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory {
+               reg = <0x40000000 0x20000000>;
+       };
+};
+
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&rmii_pins>;
+       phy-mode = "rmii";
+       phy = <&phy1>;
+       status = "okay";
+
+       phy1: ethernet-phy@1 {
+               reg = <1>;
+       };
+};

Added: head/sys/boot/fdt/dts/arm64/sun50i-a64.dtsi
==============================================================================
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm64/sun50i-a64.dtsi Wed Aug 31 16:56:54 2016        
(r305134)
@@ -0,0 +1,661 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ * based on the Allwinner H3 dtsi:
+ *    Copyright (C) 2015 Jens Kuske <jensku...@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+       interrupt-parent = <&gic>;
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       compatible = "arm,cortex-a53", "arm,armv8";
+                       device_type = "cpu";
+                       reg = <0>;
+                       enable-method = "psci";
+               };
+
+               cpu@1 {
+                       compatible = "arm,cortex-a53", "arm,armv8";
+                       device_type = "cpu";
+                       reg = <1>;
+                       enable-method = "psci";
+               };
+
+               cpu@2 {
+                       compatible = "arm,cortex-a53", "arm,armv8";
+                       device_type = "cpu";
+                       reg = <2>;
+                       enable-method = "psci";
+               };
+
+               cpu@3 {
+                       compatible = "arm,cortex-a53", "arm,armv8";
+                       device_type = "cpu";
+                       reg = <3>;
+                       enable-method = "psci";
+               };
+       };
+
+       psci {
+               compatible = "arm,psci-0.2";
+               method = "smc";
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x40000000 0>;
+       };
+
+       gic: interrupt-controller@1c81000 {
+               compatible = "arm,gic-400";
+               interrupt-controller;
+               #interrupt-cells = <3>;
+               #address-cells = <0>;
+
+               reg = <0x01c81000 0x1000>,
+                     <0x01c82000 0x2000>,
+                     <0x01c84000 0x2000>,
+                     <0x01c86000 0x2000>;
+               interrupts = <GIC_PPI 9
+                     (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts = <GIC_PPI 13
+                       (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                            <GIC_PPI 14
+                       (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                            <GIC_PPI 11
+                       (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+                            <GIC_PPI 10
+                       (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+       };
+
+       clocks {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               osc24M: osc24M_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <24000000>;
+                       clock-output-names = "osc24M";
+               };
+
+               osc32k: osc32k_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <32768>;
+                       clock-output-names = "osc32k";
+               };
+
+               cpux: clk@1c20000 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun8i-a23-pll1-clk";
+                       reg = <0x01c20000 0x4>;
+                       clocks = <&osc24M>;
+                       clock-output-names = "cpux";
+               };
+
+               periph0: clk@1c20028 {
+                       #clock-cells = <1>;
+                       compatible = "allwinner,sun6i-a31-pll6-clk";
+                       reg = <0x01c20028 0x4>;
+                       clocks = <&osc24M>;
+                       clock-output-names = "periph0", "periph0x2";
+               };
+
+               periph0d2: periph0d2_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-factor-clock";
+                       clock-div = <2>;
+                       clock-mult = <1>;
+                       clocks = <&periph0 0>;
+                       clock-output-names = "periph0d2";
+               };
+
+               periph1: clk@1c2002c {
+                       #clock-cells = <1>;
+                       compatible = "allwinner,sun6i-a31-pll6-clk";
+                       reg = <0x01c2002c 0x4>;
+                       clocks = <&osc24M>;
+                       clock-output-names = "periph1", "periph1x2";
+               };
+
+               cpu: cpu_clk@1c20050 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-cpu-clk";
+                       reg = <0x01c20050 0x4>;
+                       clocks = <&osc32k>, <&osc24M>, <&cpux>, <&cpux>;
+                       clock-output-names = "cpu";
+                       critical-clocks = <0>;
+               };
+
+               axi: axi_clk@1c20050 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-axi-clk";
+                       reg = <0x01c20050 0x4>;
+                       clocks = <&cpu>;
+                       clock-output-names = "axi";
+               };
+
+               ahb1: ahb1_clk@1c20054 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun6i-a31-ahb1-clk";
+                       reg = <0x01c20054 0x4>;
+                       clocks = <&osc32k>, <&osc24M>, <&axi>, <&periph0 0>;
+                       clock-output-names = "ahb1";
+               };
+
+               ahb2: ahb2_clk@1c2005c {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun8i-h3-ahb2-clk";
+                       reg = <0x01c2005c 0x4>;
+                       clocks = <&ahb1>, <&periph0d2>;
+                       clock-output-names = "ahb2";
+               };
+
+               apb1: apb1_clk@1c20054 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-apb0-clk";
+                       reg = <0x01c20054 0x4>;
+                       clocks = <&ahb1>;
+                       clock-output-names = "apb1";
+               };
+
+               apb2: apb2_clk@1c20058 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-apb1-clk";
+                       reg = <0x01c20058 0x4>;
+                       clocks = <&osc32k>, <&osc24M>,
+                                <&periph0 1>, <&periph0 1>;
+                       clock-output-names = "apb2";
+               };
+
+               bus_gates: bus_gates_clk@1c20060 {
+                       #clock-cells = <1>;
+                       compatible = "allwinner,sun50i-a64-bus-gates-clk",
+                                    "allwinner,sunxi-multi-bus-gates-clk";
+                       reg = <0x01c20060 0x14>;
+                       ahb1_parent {
+                               clocks = <&ahb1>;
+                               clock-indices = <1>, <5>,
+                                               <6>, <8>,
+                                               <9>, <10>,
+                                               <13>, <14>,
+                                               <18>, <19>,
+                                               <20>, <21>,
+                                               <23>, <24>,
+                                               <25>, <28>,
+                                               <32>, <35>,
+                                               <36>, <37>,
+                                               <40>, <43>,
+                                               <44>, <52>,
+                                               <53>, <54>,
+                                               <135>;
+                               clock-output-names = "bus_mipidsi", "bus_ce",
+                                               "bus_dma", "bus_mmc0",
+                                               "bus_mmc1", "bus_mmc2",
+                                               "bus_nand", "bus_sdram",
+                                               "bus_ts", "bus_hstimer",
+                                               "bus_spi0", "bus_spi1",
+                                               "bus_otg", "bus_otg_ehci0",
+                                               "bus_ehci0", "bus_otg_ohci0",
+                                               "bus_ve", "bus_lcd0",
+                                               "bus_lcd1", "bus_deint",
+                                               "bus_csi", "bus_hdmi",
+                                               "bus_de", "bus_gpu",
+                                               "bus_msgbox", "bus_spinlock",
+                                               "bus_dbg";
+                       };
+                       ahb2_parent {
+                               clocks = <&ahb2>;
+                               clock-indices = <17>, <29>;
+                               clock-output-names = "bus_gmac", "bus_ohci0";
+                       };
+                       apb1_parent {
+                               clocks = <&apb1>;
+                               clock-indices = <64>, <65>,
+                                               <69>, <72>,
+                                               <76>, <77>,
+                                               <78>;
+                               clock-output-names = "bus_codec", "bus_spdif",
+                                               "bus_pio", "bus_ths",
+                                               "bus_i2s0", "bus_i2s1",
+                                               "bus_i2s2";
+                       };
+                       abp2_parent {
+                               clocks = <&apb2>;
+                               clock-indices = <96>, <97>,
+                                               <98>, <101>,
+                                               <112>, <113>,
+                                               <114>, <115>,
+                                               <116>;
+                               clock-output-names = "bus_i2c0", "bus_i2c1",
+                                               "bus_i2c2", "bus_scr",
+                                               "bus_uart0", "bus_uart1",
+                                               "bus_uart2", "bus_uart3",
+                                               "bus_uart4";
+                       };
+               };
+
+               mmc0_clk: mmc0_clk@1c20088 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       reg = <0x01c20088 0x4>;
+                       clocks = <&osc24M>, <&periph0 1>, <&periph1 1>;
+                       clock-output-names = "mmc0";
+                };
+
+               mmc1_clk: mmc1_clk@1c2008c {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       reg = <0x01c2008c 0x4>;
+                       clocks = <&osc24M>, <&periph0 1>, <&periph1 1>;
+                       clock-output-names = "mmc1";
+               };
+
+               mmc2_clk: mmc2_clk@1c20090 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       reg = <0x01c20090 0x4>;
+                       clocks = <&osc24M>, <&periph0 1>, <&periph1 1>;
+                       clock-output-names = "mmc2";
+               };
+       };
+
+       soc {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               mmc0: mmc@1c0f000 {
+                       compatible = "allwinner,sun50i-a64-mmc",
+                                    "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c0f000 0x1000>;
+                       clocks = <&bus_gates 8>, <&mmc0_clk>,
+                                <&mmc0_clk>, <&mmc0_clk>;
+                       clock-names = "ahb", "mmc",
+                                     "output", "sample";
+                       resets = <&ahb_rst 8>;
+                       reset-names = "ahb";
+                       interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               mmc1: mmc@1c10000 {
+                       compatible = "allwinner,sun50i-a64-mmc",
+                                    "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c10000 0x1000>;
+                       clocks = <&bus_gates 9>, <&mmc1_clk>,
+                                <&mmc1_clk>, <&mmc1_clk>;
+                       clock-names = "ahb", "mmc",
+                                     "output", "sample";
+                       resets = <&ahb_rst 9>;
+                       reset-names = "ahb";
+                       interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               mmc2: mmc@1c11000 {
+                       compatible = "allwinner,sun50i-a64-mmc",
+                                    "allwinner,sun5i-a13-mmc";
+                       reg = <0x01c11000 0x1000>;
+                       clocks = <&bus_gates 10>, <&mmc2_clk>,
+                                <&mmc2_clk>, <&mmc2_clk>;
+                       clock-names = "ahb", "mmc",
+                                     "output", "sample";
+                       resets = <&ahb_rst 10>;
+                       reset-names = "ahb";
+                       interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               pio: pinctrl@1c20800 {
+                       compatible = "allwinner,sun50i-a64-pinctrl";
+                       reg = <0x01c20800 0x400>;
+                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&bus_gates 69>;
+                       gpio-controller;
+                       #gpio-cells = <3>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+
+                       uart0_pins_a: uart0@0 {
+                               allwinner,pins = "PB8", "PB9";
+                               allwinner,function = "uart0";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       uart0_pins_b: uart0@1 {
+                               allwinner,pins = "PF2", "PF3";
+                               allwinner,function = "uart0";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       uart1_2pins: uart1_2@0 {
+                               allwinner,pins = "PG6", "PG7";
+                               allwinner,function = "uart1";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       uart1_4pins: uart1_4@0 {
+                               allwinner,pins = "PG6", "PG7", "PG8", "PG9";
+                               allwinner,function = "uart1";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       uart2_2pins: uart2_2@0 {
+                               allwinner,pins = "PB0", "PB1";
+                               allwinner,function = "uart2";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       uart2_4pins: uart2_4@0 {
+                               allwinner,pins = "PB0", "PB1", "PB2", "PB3";
+                               allwinner,function = "uart2";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       uart3_pins_a: uart3@0 {
+                               allwinner,pins = "PD0", "PD1";
+                               allwinner,function = "uart3";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       uart3_2pins_b: uart3_2@1 {
+                               allwinner,pins = "PH4", "PH5";
+                               allwinner,function = "uart3";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       uart3_4pins_b: uart3_4@1 {
+                               allwinner,pins = "PH4", "PH5", "PH6", "PH7";
+                               allwinner,function = "uart3";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       uart4_2pins: uart4_2@0 {
+                               allwinner,pins = "PD2", "PD3";
+                               allwinner,function = "uart4";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       uart4_4pins: uart4_4@0 {
+                               allwinner,pins = "PD2", "PD3", "PD4", "PD5";
+                               allwinner,function = "uart4";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       mmc0_pins: mmc0@0 {
+                               allwinner,pins = "PF0", "PF1", "PF2", "PF3",
+                                                "PF4", "PF5";
+                               allwinner,function = "mmc0";
+                               allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       mmc0_default_cd_pin: mmc0_cd_pin@0 {
+                               allwinner,pins = "PF6";
+                               allwinner,function = "gpio_in";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+                       };
+
+                       mmc1_pins: mmc1@0 {
+                               allwinner,pins = "PG0", "PG1", "PG2", "PG3",
+                                                "PG4", "PG5";
+                               allwinner,function = "mmc1";
+                               allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       mmc2_pins: mmc2@0 {
+                               allwinner,pins = "PC1", "PC5", "PC6", "PC8",
+                                                "PC9", "PC10";
+                               allwinner,function = "mmc2";
+                               allwinner,drive = <SUN4I_PINCTRL_30_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+
+                       i2c0_pins: i2c0_pins {
+                               allwinner,pins = "PH0", "PH1";
+                               allwinner,function = "i2c0";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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