Author: loos
Date: Thu Dec 1 03:34:04 2016
New Revision: 309347
URL: https://svnweb.freebsd.org/changeset/base/309347
Log:
MDIO_PHYACCESS_ACK is only valid for read access, remove it from
miibus_writereg.
Reduce the DELAY() between reads while waiting for MII access.
Spotted by: yongari
Sponsored by: Rubicon Communications, LLC (Netgate)
Modified:
head/sys/arm/ti/cpsw/if_cpsw.c
head/sys/arm/ti/cpsw/if_cpswvar.h
Modified: head/sys/arm/ti/cpsw/if_cpsw.c
==============================================================================
--- head/sys/arm/ti/cpsw/if_cpsw.c Thu Dec 1 03:27:16 2016
(r309346)
+++ head/sys/arm/ti/cpsw/if_cpsw.c Thu Dec 1 03:34:04 2016
(r309347)
@@ -1512,9 +1512,6 @@ cpswp_miibus_writereg(device_t dev, int
return (0);
}
- if ((cpsw_read_4(sc->swsc, sc->phyaccess) & MDIO_PHYACCESS_ACK) == 0)
- device_printf(dev, "Failed to write to PHY.\n");
-
return (0);
}
Modified: head/sys/arm/ti/cpsw/if_cpswvar.h
==============================================================================
--- head/sys/arm/ti/cpsw/if_cpswvar.h Thu Dec 1 03:27:16 2016
(r309346)
+++ head/sys/arm/ti/cpsw/if_cpswvar.h Thu Dec 1 03:34:04 2016
(r309347)
@@ -33,8 +33,8 @@
#define CPSW_INTR_COUNT 4
/* MII BUS */
-#define CPSW_MIIBUS_RETRIES 5
-#define CPSW_MIIBUS_DELAY 1000
+#define CPSW_MIIBUS_RETRIES 20
+#define CPSW_MIIBUS_DELAY 100
#define CPSW_MAX_ALE_ENTRIES 1024
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