Author: kib
Date: Tue Mar 20 20:20:49 2018
New Revision: 331258
URL: https://svnweb.freebsd.org/changeset/base/331258

Log:
  Move the CR0.WP manipulation KPI to x86.
  
  This should allow to avoid some #ifdefs in the common x86/ code.
  
  Requested by: markj
  Sponsored by: The FreeBSD Foundation
  MFC after:    1 week

Modified:
  head/sys/amd64/amd64/machdep.c
  head/sys/amd64/include/md_var.h
  head/sys/x86/include/x86_var.h
  head/sys/x86/x86/cpu_machdep.c

Modified: head/sys/amd64/amd64/machdep.c
==============================================================================
--- head/sys/amd64/amd64/machdep.c      Tue Mar 20 20:05:11 2018        
(r331257)
+++ head/sys/amd64/amd64/machdep.c      Tue Mar 20 20:20:49 2018        
(r331258)
@@ -2597,31 +2597,6 @@ clear_pcb_flags(struct pcb *pcb, const u_int flags)
            : "cc", "memory");
 }
 
-/*
- * Enable and restore kernel text write permissions.
- * Callers must ensure that disable_wp()/restore_wp() are executed
- * without rescheduling on the same core.
- */
-bool
-disable_wp(void)
-{
-       u_int cr0;
-
-       cr0 = rcr0();
-       if ((cr0 & CR0_WP) == 0)
-               return (false);
-       load_cr0(cr0 & ~CR0_WP);
-       return (true);
-}
-
-void
-restore_wp(bool old_wp)
-{
-
-       if (old_wp)
-               load_cr0(rcr0() | CR0_WP);
-}
-
 #ifdef KDB
 
 /*

Modified: head/sys/amd64/include/md_var.h
==============================================================================
--- head/sys/amd64/include/md_var.h     Tue Mar 20 20:05:11 2018        
(r331257)
+++ head/sys/amd64/include/md_var.h     Tue Mar 20 20:20:49 2018        
(r331258)
@@ -53,8 +53,6 @@ void  amd64_conf_fast_syscall(void);
 void   amd64_db_resume_dbreg(void);
 void   amd64_lower_shared_page(struct sysentvec *);
 void   amd64_syscall(struct thread *td, int traced);
-bool   disable_wp(void);
-void   restore_wp(bool old_wp);
 void   doreti_iret(void) __asm(__STRING(doreti_iret));
 void   doreti_iret_fault(void) __asm(__STRING(doreti_iret_fault));
 void   ld_ds(void) __asm(__STRING(ld_ds));

Modified: head/sys/x86/include/x86_var.h
==============================================================================
--- head/sys/x86/include/x86_var.h      Tue Mar 20 20:05:11 2018        
(r331257)
+++ head/sys/x86/include/x86_var.h      Tue Mar 20 20:20:49 2018        
(r331258)
@@ -119,6 +119,8 @@ void        busdma_swi(void);
 bool   cpu_mwait_usable(void);
 void   cpu_probe_amdc1e(void);
 void   cpu_setregs(void);
+bool   disable_wp(void);
+void   restore_wp(bool old_wp);
 void   dump_add_page(vm_paddr_t);
 void   dump_drop_page(vm_paddr_t);
 void   finishidentcpu(void);

Modified: head/sys/x86/x86/cpu_machdep.c
==============================================================================
--- head/sys/x86/x86/cpu_machdep.c      Tue Mar 20 20:05:11 2018        
(r331257)
+++ head/sys/x86/x86/cpu_machdep.c      Tue Mar 20 20:20:49 2018        
(r331258)
@@ -621,3 +621,29 @@ hw_ibrs_disable_handler(SYSCTL_HANDLER_ARGS)
 SYSCTL_PROC(_hw, OID_AUTO, ibrs_disable, CTLTYPE_INT | CTLFLAG_RWTUN |
     CTLFLAG_NOFETCH | CTLFLAG_MPSAFE, NULL, 0, hw_ibrs_disable_handler, "I",
     "Disable Indirect Branch Restricted Speculation");
+
+/*
+ * Enable and restore kernel text write permissions.
+ * Callers must ensure that disable_wp()/restore_wp() are executed
+ * without rescheduling on the same core.
+ */
+bool
+disable_wp(void)
+{
+       u_int cr0;
+
+       cr0 = rcr0();
+       if ((cr0 & CR0_WP) == 0)
+               return (false);
+       load_cr0(cr0 & ~CR0_WP);
+       return (true);
+}
+
+void
+restore_wp(bool old_wp)
+{
+
+       if (old_wp)
+               load_cr0(rcr0() | CR0_WP);
+}
+
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