I’ve created rdar://problem/35458963 <rdar://problem/35458963> to track this problem.
> On Nov 9, 2017, at 6:09 PM, Pavel Yaskevich <pyaskev...@apple.com> wrote: > > This is broken because of the changes in the LLVM CodeGen. > >> On Nov 9, 2017, at 6:07 PM, no-re...@swift.org <mailto:no-re...@swift.org> >> wrote: >> >> New issue found! >> >> [FAILURE] oss-swift-incremental-RA-linux-ubuntu-14_04-long-test [#1495] >> >> Build URL: >> https://ci.swift.org/job/oss-swift-incremental-RA-linux-ubuntu-14_04-long-test/1495/ >> >> <https://ci.swift.org/job/oss-swift-incremental-RA-linux-ubuntu-14_04-long-test/1495/> >> Project: oss-swift-incremental-RA-linux-ubuntu-14_04-long-test >> Date of build: Thu, 09 Nov 2017 19:41:27 -0600 >> Build duration: 25 min >> Identified problems: >> >> Compile Error: This build failed because of a compile error. Below is a list >> of all errors in the build log: >> Indication 1 >> <https://ci.swift.org//job/oss-swift-incremental-RA-linux-ubuntu-14_04-long-test/1495/consoleFull#2823404933122a513-f36a-4c87-8ed7-cbc36a1ec144> >> Changes >> >> Commit 97adc5f12e40263ddb9a675a02f432c65daaee71 by ahmed.bougacha: >> [MIR] Print target-specific constant pools >> >> add: test/CodeGen/MIR/ARM/target-constant-pools-error.mir >> edit: test/CodeGen/MIR/X86/constant-pool.mir >> edit: lib/CodeGen/MIRParser/MIRParser.cpp >> edit: lib/CodeGen/MIRPrinter.cpp >> edit: include/llvm/CodeGen/MIRYamlMapping.h >> >> Commit bebdcae7d9fa45851b2f8a819b6c230115e76490 by ahmed.bougacha: >> [CodeGen] Fix some Clang-tidy modernize and Include What You Use >> >> edit: include/llvm/CodeGen/MIRYamlMapping.h >> >> Commit 66210e84c48072979e39cc4039c54042131ddab9 by ahmed.bougacha: >> [GlobalISel][X86] G_FCONSTANT support. >> >> edit: lib/Target/X86/X86InstructionSelector.cpp >> edit: test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir >> edit: test/CodeGen/X86/GlobalISel/legalize-constant.mir >> add: test/CodeGen/X86/GlobalISel/fconstant.ll >> add: test/CodeGen/X86/GlobalISel/select-fconstant.mir >> edit: lib/Target/X86/X86RegisterBankInfo.cpp >> edit: lib/Target/X86/X86LegalizerInfo.cpp >> >> Commit 121242ac03980a7c3ba46a7de539694fcbaa2c62 by ahmed.bougacha: >> [GlobalISel][X86] Use correct physical register in mir tests.NFC. >> >> edit: test/CodeGen/X86/GlobalISel/select-phi.mir >> edit: test/CodeGen/X86/GlobalISel/select-xor-scalar.mir >> edit: test/CodeGen/X86/GlobalISel/legalize-ext.mir >> edit: test/CodeGen/X86/GlobalISel/select-undef.mir >> edit: test/CodeGen/X86/GlobalISel/select-ext.mir >> edit: test/CodeGen/X86/GlobalISel/select-add.mir >> edit: test/CodeGen/X86/GlobalISel/select-and-scalar.mir >> edit: test/CodeGen/X86/GlobalISel/select-insert-vec512.mir >> edit: test/CodeGen/X86/GlobalISel/select-ext-x86-64.mir >> edit: test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir >> edit: test/CodeGen/X86/GlobalISel/select-cmp.mir >> edit: test/CodeGen/X86/GlobalISel/select-mul-scalar.mir >> edit: test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir >> edit: test/CodeGen/X86/GlobalISel/legalize-cmp.mir >> edit: test/CodeGen/X86/GlobalISel/legalize-insert-vec512.mir >> edit: test/CodeGen/X86/GlobalISel/select-unmerge-vec512.mir >> edit: test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir >> edit: test/CodeGen/X86/GlobalISel/legalize-phi.mir >> edit: test/CodeGen/X86/GlobalISel/select-or-scalar.mir >> >> Commit 6a3164df8f2c3e6cdd5ad806b5bdc8cfe97dafac by ahmed.bougacha: >> [GlobalISel][X86] Legalize i1 G_ADD/G_SUB/G_MUL/G_XOR/G_OR/G_AND >> >> edit: test/CodeGen/X86/GlobalISel/legalize-add.mir >> edit: test/CodeGen/X86/GlobalISel/legalize-and-scalar.mir >> edit: test/CodeGen/X86/GlobalISel/or-scalar.ll >> add: test/CodeGen/X86/GlobalISel/sub-scalar.ll >> edit: test/CodeGen/X86/GlobalISel/and-scalar.ll >> edit: test/CodeGen/X86/GlobalISel/legalize-xor-scalar.mir >> edit: test/CodeGen/X86/GlobalISel/xor-scalar.ll >> edit: test/CodeGen/X86/GlobalISel/add-scalar.ll >> edit: test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir >> edit: test/CodeGen/X86/GlobalISel/legalize-or-scalar.mir >> edit: test/CodeGen/X86/GlobalISel/legalize-sub.mir >> edit: lib/Target/X86/X86LegalizerInfo.cpp >> >> Commit 736be99a0dd878ec734bf7aa455906e772ee6be5 by ahmed.bougacha: >> [GlobalISel][X86] refactoring X86InstructionSelector.cpp .NFC. >> >> edit: lib/Target/X86/X86InstructionSelector.cpp >> >> Commit 9881d01abf1a02ca2a2e174dfb16a2f49a21e2ef by ahmed.bougacha: >> Split opt-remark YAML and opt output testing on this test >> >> edit: test/Transforms/GVN/opt-remarks.ll >> >> Commit 13c9ccabd4d81a8ceb36abc2bfcf52497a9be844 by ahmed.bougacha: >> Improve comment >> >> edit: include/llvm/Analysis/OptimizationDiagnosticInfo.h >> >> Commit 42a3c53004c2529fbfcb6e4bbe8391880aa6667a by ahmed.bougacha: >> This patch fixes https://bugs.llvm.org/show_bug.cgi?id=32352 >> <https://bugs.llvm.org/show_bug.cgi?id=32352> It enables >> >> edit: include/llvm/CodeGen/MachineOptimizationRemarkEmitter.h >> edit: lib/LTO/LTOCodeGenerator.cpp >> edit: tools/llvm-lto/llvm-lto.cpp >> edit: lib/Transforms/Scalar/GVN.cpp >> edit: lib/IR/Core.cpp >> edit: lib/IR/DiagnosticInfo.cpp >> edit: lib/IR/LLVMContext.cpp >> edit: tools/lto/lto.cpp >> edit: include/llvm/IR/LLVMContext.h >> edit: include/llvm/LTO/Config.h >> edit: include/llvm/LTO/legacy/LTOCodeGenerator.h >> edit: lib/IR/LLVMContextImpl.cpp >> edit: tools/llc/llc.cpp >> edit: tools/llvm-link/llvm-link.cpp >> edit: test/Transforms/GVN/opt-remarks.ll >> edit: tools/llvm-dis/llvm-dis.cpp >> edit: lib/IR/LLVMContextImpl.h >> edit: lib/Transforms/Vectorize/LoopVectorize.cpp >> edit: include/llvm/IR/DiagnosticInfo.h >> edit: lib/IR/CMakeLists.txt >> edit: include/llvm/Analysis/OptimizationDiagnosticInfo.h >> add: include/llvm/IR/DiagnosticHandler.h >> add: lib/IR/DiagnosticHandler.cpp >> >> Commit 7e92e11fef4d76d8a9d04115a76a032ae3957548 by ahmed.bougacha: >> Allow ORE.emit to take a closure to delay building the remark object >> >> edit: lib/IR/DiagnosticInfo.cpp >> edit: include/llvm/IR/DiagnosticHandler.h >> edit: include/llvm/IR/DiagnosticInfo.h >> edit: lib/IR/DiagnosticHandler.cpp >> edit: include/llvm/Analysis/OptimizationDiagnosticInfo.h >> >> Commit cb23c2b83f82388ede37e1d1805c73f35eb6666d by ahmed.bougacha: >> Fix build for LLVM unittests >> >> edit: unittests/Linker/LinkModulesTest.cpp >> >> Commit 977c701bfe137665dff3f6d09808b71ce40210a2 by ahmed.bougacha: >> [GlobalISel] Only build expensive remarks if they're enabled. NFC. >> >> edit: lib/CodeGen/GlobalISel/IRTranslator.cpp >> edit: lib/CodeGen/GlobalISel/Utils.cpp >> >> Commit c94ff728d8d1155a8594e992b0a83dc8fa3fc85d by ahmed.bougacha: >> [globalisel] Add support for intrinsic_w_chain. >> >> edit: utils/TableGen/GlobalISelEmitter.cpp >> add: test/CodeGen/X86/GlobalISel/select-intrinsic-x86-flags-read-u32.mir >> edit: include/llvm/Target/GlobalISel/SelectionDAGCompat.td >> >> Commit 45db2d984b6241c49bdf1a2406bec7565f7cac94 by ahmed.bougacha: >> [globalisel] Add support for intrinsic_void >> >> add: test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-hint.mir >> edit: include/llvm/Target/GlobalISel/SelectionDAGCompat.td >> >> Commit ddb01fed5e7d30f2d372d49ce81e3ea1b74f85a8 by ahmed.bougacha: >> [globalisel] Add a G_BSWAP instruction and support bswap using it. >> >> edit: include/llvm/Target/GenericOpcodes.td >> edit: include/llvm/Target/TargetOpcodes.def >> edit: lib/Target/AArch64/AArch64LegalizerInfo.cpp >> edit: include/llvm/Target/GlobalISel/SelectionDAGCompat.td >> add: test/CodeGen/AArch64/GlobalISel/select-bswap.mir >> >> Commit bd502f2f0000a8ebe30f328d4e41ed59e8d40368 by ahmed.bougacha: >> [MIRPrinter] Print empty successor lists when they cannot be guessed >> >> edit: lib/CodeGen/MIRPrinter.cpp >> add: test/CodeGen/MIR/X86/unreachable_block.ll >> edit: test/CodeGen/MIR/ARM/ifcvt_canFallThroughTo.mir >> >> Commit 213db310e21e190687471662b2e8d238b3273659 by ahmed.bougacha: >> [ARM] Fix some Clang-tidy modernize-use-using and Include What You Use >> >> edit: lib/Target/ARM/ARMCallLowering.cpp >> edit: lib/Target/ARM/ARMCallLowering.h >> >> Commit eb8a047cbe0a9e2290b1e80e561cd9d6ea55a01f by ahmed.bougacha: >> [GlobalISel] Update the documentation and comments for G_EXTRACT >> >> edit: docs/GlobalISel.rst >> edit: include/llvm/Target/GenericOpcodes.td >> >> Commit a0555e9f3951aea6057c1f174cd3aaa40e9c67c0 by ahmed.bougacha: >> [GlobalISel] Update the documentation for G_SEQUENCE >> >> edit: docs/GlobalISel.rst >> >> Commit ad3f195ed233bce75f1ad915e9d4aadb66427b2a by ahmed.bougacha: >> [GlobalISel] Update the documentation and comment for G_[UN]MERGE_VALUES >> >> edit: docs/GlobalISel.rst >> edit: include/llvm/Target/GenericOpcodes.td >> >> Commit 031892702a0314ead57fd9e002909caf61205811 by ekarpenkov: >> Revert "Add _Float16 as a C/C++ source language type" >> >> edit: lib/AST/ASTContext.cpp >> edit: lib/CodeGen/ItaniumCXXABI.cpp >> edit: lib/CodeGen/CodeGenTypes.cpp >> edit: lib/Format/FormatToken.cpp >> edit: lib/AST/StmtPrinter.cpp >> edit: lib/Sema/SemaType.cpp >> edit: include/clang-c/Index.h >> edit: lib/AST/ItaniumMangle.cpp >> edit: include/clang/Basic/TokenKinds.def >> edit: include/clang/Sema/DeclSpec.h >> edit: lib/CodeGen/CGDebugInfo.cpp >> edit: lib/Parse/ParseExpr.cpp >> edit: tools/libclang/CXType.cpp >> edit: lib/Analysis/PrintfFormatString.cpp >> edit: lib/Sema/DeclSpec.cpp >> edit: include/clang/Basic/Specifiers.h >> edit: include/clang/AST/BuiltinTypes.def >> edit: lib/AST/Type.cpp >> edit: include/clang/AST/ASTContext.h >> edit: lib/CodeGen/CGExprScalar.cpp >> edit: include/clang/Serialization/ASTBitCodes.h >> edit: lib/Parse/ParseExprCXX.cpp >> delete: test/Frontend/float16.cpp >> edit: lib/AST/TypeLoc.cpp >> edit: lib/Serialization/ASTReader.cpp >> edit: include/clang/Lex/LiteralSupport.h >> edit: lib/Sema/SemaDecl.cpp >> edit: lib/Sema/SemaTemplateVariadic.cpp >> edit: lib/Parse/ParseDecl.cpp >> edit: lib/AST/NSAPI.cpp >> edit: lib/Index/USRGeneration.cpp >> edit: test/Lexer/half-literal.cpp >> edit: lib/Lex/LiteralSupport.cpp >> edit: lib/Parse/ParseTentative.cpp >> edit: lib/Serialization/ASTCommon.cpp >> edit: lib/AST/MicrosoftMangle.cpp >> edit: lib/Sema/SemaExpr.cpp >> delete: test/CodeGenCXX/float16-declarations.cpp >> >> Commit 11f34cfdd31ec9552df7fb7679064c0375c7f34f by ahmed.bougacha: >> This patch fixes https://bugs.llvm.org/show_bug.cgi?id=32352 >> <https://bugs.llvm.org/show_bug.cgi?id=32352> LLVM code >> >> edit: lib/CodeGen/CodeGenAction.cpp >> >> Commit cae699c147cc75c5eeabf6d452384b4ee76fc3f8 by ahmed.bougacha: >> Fix ClangDiagnosticHandler::is*RemarkEnabled members >> >> add: test/Frontend/optimization-remark-extra-analysis.c >> edit: lib/CodeGen/CodeGenAction.cpp >
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