Can you find some info from sinit_errors.txt (see attached) in the SINIT 
package on sourceforge?

But your type field is 5, it is strange.

Shane

Jonathan M. McCune wrote:
> Hello list,
> 
> Actually, I've just found Table 15 in Appendix B in the MLE
> Developer's Guide.
> 
> I'm receiving error #BadACMMType (LT.ERRORCODE=0xc0000005).  Does this
> mean that the MTRRs are incorrectly set for the ACMod area?  From the
> table: "Load memory type error in Authenticated Code Execution Area."
> 
> Some more of the table:
> 
> Type Field Encodings for Processor-Initiated Intel(r) TXT Shutdowns
> 
> Type Error condition Mnemonic
> 
> 0 Legacy shutdown #LegacyShutdown
> 1-4 Reserved Reserved
> 5 Load memory type error in Authenticated Code Execution Area
> #BadACMMType 6 Unrecognized AC module format #UnsupportedACM
> 7 Failure to authenticate #AuthenticateFail
> 8 Invalid AC module format #BadACMFormat
> 9 Unexpected snoop hit detected #UnexpectedHITM
> 10 Invalid event #InvalidEvent
> 
> Any advice / suggestions are much appreciated.
> 
> Thanks,
> -Jon
> 
> 
> 
> Jonathan M. McCune wrote:
>> Hello list,
>> 
>> Where can I find a description of the causes associated with various
>> "processor error codes" that may end up in LT.ERRORCODE following an
>> attempted GETSEC[SENTER]?  The MLE developer's guide seems to contain
>> only LCP-related error codes.
>> 
>> Thanks!
>> -Jon
>> 
>> 
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Definition of the TXT.ERRORCODE register for Q35_X38-SINIT:
==========================================================

Bit   Name        Description
---   ----        -----------
31    Valid       Valid error when set to '1'. The rest of the register
                  contents should be ignored if '0'
30    External    '0' if induced from the processor
                  '1' if induced from software
29:0  Type        This is implementation and source specific. It provides more
                  details on what the step was being performed at the time a
                  failure condition was detected


Type field definition for AC modules:
====================================

Bit     Description
-----   -----------
29:25   Reserved
24:16   TPM command return code, valid only for progress code 0dh and error
        code 1010
15      '0' if error generated by AC module (below field definitions apply)
        '1' if generated by other software (field definitions will be
        software-specific)
14      Reserved
13:10   AC module error codes
9:4     AC module progress codes
0:3     AC module type
        0000  BIOS
        0001  SINIT
        0010 - 1111 Reserved for future use


SINIT Progress and Error Codes:
==============================
(Error codes of 0000 indicate an unexpected error during the indicated
processing)

Progress   Error
Code       Code      Description
--------   -----     -----------
00h        0000      SINIT Exit Point
           0001      EntryPoint field of MLE header is outside of MLE linear
                     address space

01h        0000      SINIT Entry Point
           0001      TXT.HEAP.BASE/SIZE registers were not initialized by BIOS
           0010      DPR BASE/SIZE registers were not initialized by BIOS

02h        0000      Initial Checks
           0001      SINIT does not support platform's chipset device ID
           0010      SINIT does not support platform's chipset device
                     extended ID
           0011      SINIT does not support platform's chipset stepping
           0100      SINIT was not invoked by GETSEC[SENTER]

03h        0000      Start MTRR Check
           0001      DEF_TYPE MTRR not UC or fixed MTRRs not disabled
           0010      variable MTRRs types not WB
           0011      variable MTRRs overlap
           0100      variable MTRR base not a multiple of its size
           0101      variable MTRRs not cover SINIT (rounded up to 4k boundary)
           0110      variable MTRRs not cover single contiguous region
           0111      Invalid MTRR mask value
           1000      SINIT size larger than Authenticated Code Execution
                     Area (ACEA)

04h        0000      Chipset Configuration Testing
           0001      unused
           0010      DPR size too small (< 3MB)
           0011      GBSM (graphics stolen memory) base address is invalid
           0100      TXT heap size incorrect (not 896KB)
           0101      TXT heap not completely contained within DPR
           0110      SINIT region not completely contained within DPR
           0111      size of SINIT region (TXT.SINIT.SIZE) incorrect (!= 128KB)
           1000      unused
           1001      unused
           1010      BGSM (GTT stolen memory) base address is invalid
           1011      TSEGSM (TSEG stolen memory) base address is invalid
           1100      one base address register (BAR) overlaps another
           1101      DPR register is unlocked
           1111      Specified SINIT address is not located within SINIT
                     region (TXT.SINIT.BASE/SIZE)

05h        0000      Reading OsSinitData
           0001      version not supported (does not match OsSinitDataVer
                     field of SINIT's chipset information table)
           0010      PMR Low Base or Size not 2MB granular
           0011      PMR Low Base > 4GB
           0100      PMR Low Size > 4GB
           0101      PMR High Base or Size not 2MB granular
           0110      PMR Low fields specify range that overlaps PMR High range
           0111      LCP PO address is invalid
           1000      OsSinitDataSize incorrect
           1001      Requested capabilities (OsSinitData.Capabilites) are not
                     supported

06h        0000      Enable TXT Protections
           No error codes currently defined.

07h        0000      Processing MLE Page Tables
           0001      a page directory entry is not contiguous
           0010      a page table entry is not contiguous
           0011      a non-initial entry (PDPE/PDE/PTE) is invalid/not present
                     (i.e. holes in page table are not allowed)
           0100      one of the rules for table address ordering was not met
           0101      duplicate page encountered
           0110      MLE size specified by page table does not match size in
                     OsSinitData
           0111      2MB page sizes not supported
           1000      page overlaps VT-d DMAR table
           1001      page is outside of "good" MDR regions
           1010      page is not covered by DPR nor PMR regions

08h        0000      Registering STM Hash
           No error codes currently defined.

09h        0000      Registering MLE Hash
           No error codes currently defined.

0ah        0000      Building SinitMleData
           0001      could not find RSDP ACPI table
           0010      RSDP ACPI table checksum invalid
           0011      RSDT ACPI table checksum invalid
           0100      could not find VT-d DMAR ACPI table
           0101      VT-d DMAR ACPI table checksum invalid
           0110      BARs in VT-d DMAR DRHD struct mismatch
           0111      VT-d DMAR ACPI table length incorrect
           1000      device scope of VT-d DMAR ACPI table is invalid
           1001      include all bit in last DHRD struct is clear
           1010      addresses in VT-d RMRR ACPI table are invalid
           1011      VT-d DMAR ACPI table overlaps DPR

0bh        0000      Processing MLE Header Structure
           0001      unsupported version (< 2.0)
           0010      invalid GUID
           0011      FirstValidPage field invalid or does not match first
                     valid page in page table
           0100      MLE does not support SINIT's RLP wakeup capability

0ch        0000      MSEG Checking
           0001      SMRAM not locked
           0010      invalid MSEG size
           0011      invalid MSEG base
           0100      inconsistent MSEG base

0dh        0000      TPM_Extend Attempt
           0001      TPM is not ready (TPM_ACCESS_x invalid)
           0010      unable to get access to the locality
           0011      TPM is not ready (TPM_STS_x invalid)
           0100      TPM is not ready to accept a command
           0101      unused
           0110      reserved
           0111      reserved
           1000      invalid response from the TPM
           1001      timeout for TPM response
           1010      TPM returned an error (see bits 24:16 for error value)

0eh        0000      SCHECK
           0001      top of low usable memory (TOLUD) is incorrect
           0010      unused
           0011      DRB registers incorrect
           0100      memory alias detected
           0101      Remap Size or Remap Base registers incorrect
           0110      top of upper usable memory (TOUUD) is incorrect
           0111      contents of AUX TPM NV index invalid

0fh        0000      Chipset Protection
           0001      VT-d remap engine enabled
           1110      Current values of VT-d PMR registers do not match
                     requested values in SinitMleData

10h        0000      Processing Launch Control Policy
           0001      current SINIT module is revoked by the policy
           0010      unsupported policy version
           0011      integrity of PD policy data invalid
           0100      integrity of PO policy data invalid
           0101      no PD policy data was provided
           0110      no PO policy data was provided
           0111      unused
           1000      unsupported policy type
           1001      unsupported hash algorithm
           1010      unused
           1011      unused
           1100      unused
           1101      MLE measurement is not in policy
           1110      platform configuration is not in policy
           1111      unused

11h        0000      Miscellaneous
           0001      an interrupt or exception occurred
           0010      TXT heap usage exceeds allocated size
           0011      BIOS ACM has not been registered
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