Tim Deegan wrote on 2011-12-27: > At 10:05 +0000 on 27 Dec (1324980346), Wei, Gang wrote: >>> So you jumped from 100ms to 10us - how was that value established? >>> Or in other words, how certain is it that this (or any other) >>> timeout is sufficient for all current and future systems implementing tboot? >> >> First way, code analysis. Tboot VMExitHandler only judge the >> condition, enable trapping SIPI, then VMResume. 10us means more than >> 10,000 cycles in Intel processors supporting TXT, it should be >> enough for this simple code path. > > Unless the BIOS does clever things in SMM of course. :)
If no further question on this patch from anyone else, could you help to check it in? > >> Further, I am working on changing the SMP bring-up sequence for >> tboot path from INIT-SIPI-SIPI to MWAIT-memwrite style. It means >> tboot APs will wait in MWAIT loops and Xen BSP will try to write the >> monitored memory to bring APs out of MWAIT loops. > > That sounds like a very good idea. I will send out the patch for MWAIT SMP bring-up soon. Jimmy ------------------------------------------------------------------------------ Write once. Port to many. Get the SDK and tools to simplify cross-platform app development. Create new or port existing apps to sell to consumers worldwide. Explore the Intel AppUpSM program developer opportunity. appdeveloper.intel.com/join http://p.sf.net/sfu/intel-appdev _______________________________________________ tboot-devel mailing list tboot-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/tboot-devel
