Hej Jonathan, On 08:57 Mon 08 Sep , Jonathan McCune wrote: > If you consider the alignment requirements of the entry point, and layout > your MLE with the entry point in the first 4K, you may be able to mask > things such that you do not have to care about the low 12 bits.
AFAIK, there are no strict rules for alignment of the MLE-entry-point,
are there? I grep'ed through the TXT SDM and found none. But even if so,
I don't really understand what you want to say (sry, too much
spec-reading today).
Because paging is off and CS starts at 0h I need the physical address of
my code. The MLE-image can be placed everywhere below 4Gb, I can't know
the exact address of it at compile-/link-time, so I need to find out at
run-time. For that I need the EIP value. I know that flicker does that
by doing
> _pal_start:
> call 1f
> 1: popl %eax // put EIP into EAX
, which is the idiom which I would also use. But one of the two specs
says (the txt spec, not the instruction spec) that ESP/EBP/SS is
undefined right after the SINIT jumped to the entry-point (`_pal_start`
in the example above). So this code may as well fail randomly.
If I miss something here, please tell me :)
--
best regards,
- Benjamin Block
--
BOFH Excuse #71:
The file system is full of it
pgpFsJm8AlJR6.pgp
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