# HG changeset patch
# User Michal Camacho Romero <[email protected]>
# Date 1770122503 -3600
#      Tue Feb 03 13:41:43 2026 +0100
# Node ID 1232464471185e11faf58825ca0bb1fea64c7924
# Parent  6aefe80324aec8673ef9347cfb1d624da328f2e8
Disable CET in the TBOOT shutdown handler

During PC shutdown, the Linux Kernel works under enable Intel CET technology,
which enforces indirect branch tracking (IBT) mechanism for CPU indirect jumps 
and calls.
It prevented CPU to jump into the TBOOT shutdown handler, during PC shutdown 
process.
In the result, Kernel threw "Missing ENDBR" bug, when CPU tried to jump to the 
TBOOT shutdown
handler's entry.

The given bug was resolved by endbr64 instuction call at the begin of TBOOT 
shutdown handler
and through disabling CET prior to the next CPU jump execution.

It resolves TBOOT shutdown failure bug, reported on the SLES (SUSE Linux 
Enterprise Server)
16.0 OS. OS power off, called by the "init 0" command, was failing, due to 
activated Intel
Control-Flow Enforcement Technology (CET). Disabling CET has allowed to execute 
OS and
TBOOT shutdown properly.

Closes: https://bugzilla.suse.com/show_bug.cgi?id=1247950

diff -r 6aefe80324ae -r 123246447118 tboot/common/shutdown.S
--- a/tboot/common/shutdown.S   Wed Jan 28 23:26:31 2026 +0100
+++ b/tboot/common/shutdown.S   Tue Feb 03 13:41:43 2026 +0100
@@ -116,9 +116,21 @@
  */
 ENTRY(shutdown_entry)
        .code64
+        endbr64
        cli
        wbinvd
 
+        /* Disable CET*/
+        movl    $0, %eax
+        movl    $0, %edx
+        movl    $MSR_IA32_U_CET, %ecx
+        wrmsr
+
+        movl    $0, %eax
+        movl    $0, %edx
+        movl    $MSR_IA32_S_CET, %ecx
+        wrmsr
+
        movl    $MSR_EFER,%ecx
        rdmsr
        bt      $_EFER_LME,%eax
diff -r 6aefe80324ae -r 123246447118 tboot/include/msr.h
--- a/tboot/include/msr.h       Wed Jan 28 23:26:31 2026 +0100
+++ b/tboot/include/msr.h       Tue Feb 03 13:41:43 2026 +0100
@@ -95,6 +95,10 @@
 /* AMD64 MSR's */
 #define MSR_EFER        0xc0000080      /* extended features */
 
+/* CET MSRs*/
+#define MSR_IA32_U_CET  0x000006a0 /* user mode cet */
+#define MSR_IA32_S_CET  0x000006a2 /* kernel mode cet */
+
 /* EFER bits */
 #define _EFER_LME     8               /* Long mode enable */
 



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