Le 04/06/13 09:39, Martin Husemann a écrit :
On Mon, Jun 03, 2013 at 08:34:37PM +0000, Eduardo Horvath wrote:
So your MMU doesn't support multiple address space IDs? That sux. That
means you need to blow away the entire MMU each time you switch processes.
If you do have ASIDs, I like to reserve one for the kernel. That way you
don't need to share the address space with userland.
Let me second this - make the MMU know address space IDs and reserve one
(typical choice: 0) for the kernel.
Then either provide (priviledged) load/store instructions to access
foreign address spaces (providing the other ID in a cpu register), or
add a mmu register to load a special address space ID and add
load/store-with-that-other-id instructions.
Martin
Hi,
Indeed the MMU does not have support for Address Space ID (yet ?). I
will therefore be forced to flush TLB at context switch :/
Support for ASID would be a nice improvement for performances that I
save for later.
It is not necessary for things to work, and can easily be added later on
without breaking any software compatibility if I add a bit in a
configuration register that can be checked at run-time to test if lm32
MMU supports ASID or not.
Moreover, adding new instructions is not that simple and I would prefer
using the less possible resources for the MMU and save the very small
amount of unused opcodes for other projects.
But I will definitely think about adding ASID as a first improvement to
the MMU when everything will be working with the current design :)
Thanks!
Regards,
--
Yann Sionneau