I am writing a driver for an arm random number generator accelerator to provide a source of random bits to rnd_pool.
How does one know at what rate to supply random bits to the pool using rnd_add_data()? Assume for a moment that more bits/sec can be generated than are needed, what criteria should be used to decide the rate to provide bits to the pool? Is there any feedback mechanism that can be used to govern the flow? There are 3 instances of an RNGA driver in the source tree that I found, two of which provide 32 bits every 10msecs or so, and a third that provide an unknown number of bits (assuming > 32bits) every 100msecs. Does anyone know the reasoning used for the examples described. (i386/pci/glxsb.c, x86/pci/fwrng.c, x86/x86/via_padlock.c) Thanks -- Frank Zerangue [email protected]
