mrg@ wrote: (now completely off topic)
> > > FYI: not all -- sparc64 either maps PCI space as little > > > endian or uses little endian accesses, both of which give > > > you the byte swapped data directly. > > > > Even in that case, the hardware checks access width and > > all byte accesses can be done at the same address > > as the little endian machines by complicated hardware > > (i.e. #if BYTE_ORDER in the patch won't work), right? > > right. i just wanted to point out that sometimes the byte > swapping occurs in hardware. I also wonder if there is any OS implementation that enables that feature for DMA and how the hardware designers considered about possible use cases. Most bus masters use word access even on fetching byte data, and there are also many implementation (memcpy(9) etc) which use word access even against stream data (which shouldn't be byte-swapped) so access width detection for byteswap won't work as expected. --- Izumi Tsutsui
