From: Ryo ONODERA <[email protected]>, Date: Wed, 13 Aug 2014 20:31:31 +0900 (JST)
> From: Ryo ONODERA <[email protected]>, Date: Wed, 13 Aug 2014 00:57:39 > +0900 (JST) > >> From: Takahiro HAYASHI <[email protected]>, Date: Tue, 12 Aug 2014 >> 21:49:35 +0900 >> >>> On 08/12/14 20:37, Ryo ONODERA wrote: >>>> From: Takahiro HAYASHI <[email protected]>, Date: Tue, 12 Aug 2014 >>>> 02:14:43 +0900 >>> [snip] >>>>> I have some questions. >>>>> >>>>> 1) Do you have PCI_INTR_FIXUP in your kernel config? >>>> >>>> I had no PCI_INTR_FIXUP in kernel config. >>>> I have added PCI_INTR_FIXUP to my kernel config, and no effects. >>> >>> hmm.. >>> >>>>> 2) Is the port enabled -- has XHCI_PS_PED in PORTSC? >>>> >>>> All PORTSC is 0x2a0. >>>> It means port is disabled? >>> >>> Yes, disabled. >>> >>> xHCI 1.1 section 5.4.8 PORTSC reg says 0x2a0 means >>> XHCI_PS_CCS = 0: device is not connected >>> XHCI_PS_PED = 0: port disabled >>> XHCI_PS_PLS = 0x5: Link is in the RxDetect state >>> XHCI_PS_PP = 1: not power-off state >>> >>> RxDetect is the state after port warm reset. >>> In this state controller is waiting for device. >>> >>> >>> - xHCI specification 1.1 >>> http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/extensible-host-controler-interface-usb-xhci.pdf >> >> Hi, >> >> Thanks for your explanation. >> I read xhci spec already. >> But I cannot find missing something for Intel xhci device... > > Hi, > > I have found xHC halting is done before resetting, and Linux and edk2 > confirm whether xHC is really halted. > I have added similar code to NetBSD's xhci.c like following. > > And I have gotten > > xhci0: init failed, error=5 > > error. > > Index: xhci.c > =================================================================== > RCS file: /cvsroot/src/sys/dev/usb/xhci.c,v > retrieving revision 1.26 > diff -u -r1.26 xhci.c > --- xhci.c 12 Aug 2014 13:50:42 -0000 1.26 > +++ xhci.c 13 Aug 2014 11:26:39 -0000 > @@ -682,7 +682,14 @@ > > usbcmd = 0; > xhci_op_write_4(sc, XHCI_USBCMD, usbcmd); > - usb_delay_ms(&sc->sc_bus, 1); > + for (i = 0; i < 100; i++) { > + usbsts = xhci_op_read_4(sc, XHCI_USBSTS); > + if ((usbsts & XHCI_STS_HCH) == 0) > + break; > + usb_delay_ms(&sc->sc_bus, 1); > + } > + if (i >= 100) > + return EIO; > > usbcmd = XHCI_CMD_HCRST; > xhci_op_write_4(sc, XHCI_USBCMD, usbcmd); Oops. (usbsts & XHCI_STS_HCH) == 0 should be 1. It is my misunderstanding. Sorry. -- Ryo ONODERA // [email protected] PGP fingerprint = 82A2 DC91 76E0 A10A 8ABB FD1B F404 27FA C7D1 15F3
