Hi,
how about you tried this patch? Among quite a few other changes, I need
to remove AWIN_GMAC_MAC_INT_RGSMII from the default mask to make the
awge0 on my DE0 nano-soc work (at Gbps speed, and because the PHY there
is connected via RGMII). It looks like the media changing code is
present but we mask media changing interrupts, so you might lose at
100Mbps and be lucky at 1Gbps. My analysis could be wrong though, I'm
interested in your feedback.
Regards,
Aymeric
diff --git a/sys/dev/ic/dwc_gmac.c b/sys/dev/ic/dwc_gmac.c
index ce5635db0d3f..41c92003e9fb 100644
--- a/sys/dev/ic/dwc_gmac.c
+++ b/sys/dev/ic/dwc_gmac.c
@@ -120,9 +120,7 @@ static uint32_t bitrev32(uint32_t x);
GMAC_DMA_INT_UNE|GMAC_DMA_INT_OVE| \
GMAC_DMA_INT_TJE)
-#define AWIN_DEF_MAC_INTRMASK \
- (AWIN_GMAC_MAC_INT_TSI | AWIN_GMAC_MAC_INT_ANEG | \
- AWIN_GMAC_MAC_INT_LINKCHG | AWIN_GMAC_MAC_INT_RGSMII)
+#define AWIN_DEF_MAC_INTRMASK AWIN_GMAC_MAC_INT_TSI
#ifdef DWC_GMAC_DEBUG
