Here is a diff which makes sis(4) attach and run on big-endian machines
(macppc, sgi...), at least for this particular flavour:
ppb0 at pci0 dev 6 function 0 "TI PCI2250 PCI-PCI" rev 0x02
pci1 at ppb0 bus 1
sis0 at pci1 dev 0 function 0 "NS DP83815 10/100" rev 0x00, DP83816A: irq 6,
address 00:00:24:c3:49:48
nsphyter0 at sis0 phy 0: DP83815 10/100 PHY, rev. 1
sis1 at pci1 dev 1 function 0 "NS DP83815 10/100" rev 0x00, DP83816A: irq 2,
address 00:00:24:c3:49:49
nsphyter1 at sis1 phy 0: DP83815 10/100 PHY, rev. 1
other models, which use a different way to store the Ethernet address,
might get it wrong though.
Comments and tests welcome. Should not affect little-endian systems, but
I wouldn't mind some soekris tests (-:
Miod
Index: if_sis.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_sis.c,v
retrieving revision 1.93
diff -u -p -r1.93 if_sis.c
--- if_sis.c 22 Jun 2009 22:14:21 -0000 1.93
+++ if_sis.c 15 Jul 2009 21:12:40 -0000
@@ -307,7 +307,7 @@ sis_read_eeprom(struct sis_softc *sc, ca
sis_eeprom_getword(sc, off + i, &word);
ptr = (u_int16_t *)(dest + (i * 2));
if (swap)
- *ptr = ntohs(word);
+ *ptr = letoh16(word);
else
*ptr = word;
}
@@ -344,11 +344,11 @@ sis_read_mac(struct sis_softc *sc, struc
SIS_CLRBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ENABLE);
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR0);
- enaddr[0] = CSR_READ_4(sc, SIS_RXFILT_DATA) & 0xffff;
+ enaddr[0] = letoh16(CSR_READ_4(sc, SIS_RXFILT_DATA) & 0xffff);
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR1);
- enaddr[1] = CSR_READ_4(sc, SIS_RXFILT_DATA) & 0xffff;
+ enaddr[1] = letoh16(CSR_READ_4(sc, SIS_RXFILT_DATA) & 0xffff);
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR2);
- enaddr[2] = CSR_READ_4(sc, SIS_RXFILT_DATA) & 0xffff;
+ enaddr[2] = letoh16(CSR_READ_4(sc, SIS_RXFILT_DATA) & 0xffff);
SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ENABLE);
}
@@ -363,7 +363,7 @@ sis_read96x_mac(struct sis_softc *sc)
for (i = 0; i < 2000; i++) {
if ((CSR_READ_4(sc, SIS_EECTL) & SIS96x_EECTL_GNT)) {
sis_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
- SIS_EE_NODEADDR, 3, 0);
+ SIS_EE_NODEADDR, 3, 1);
break;
} else
DELAY(1);
@@ -1000,7 +1000,8 @@ sis_attach(struct device *parent, struct
{
u_int16_t tmp[4];
- sis_read_eeprom(sc, (caddr_t)&tmp, NS_EE_NODEADDR,4,0);
+ sis_read_eeprom(sc, (caddr_t)&tmp, NS_EE_NODEADDR,
+ 4, 0);
/* Shift everything over one bit. */
tmp[3] = tmp[3] >> 1;
@@ -1011,9 +1012,9 @@ sis_attach(struct device *parent, struct
tmp[1] |= tmp[0] << 15;
/* Now reverse all the bits. */
- tmp[3] = sis_reverse(tmp[3]);
- tmp[2] = sis_reverse(tmp[2]);
- tmp[1] = sis_reverse(tmp[1]);
+ tmp[3] = letoh16(sis_reverse(tmp[3]));
+ tmp[2] = letoh16(sis_reverse(tmp[2]));
+ tmp[1] = letoh16(sis_reverse(tmp[1]));
bcopy((char *)&tmp[1], sc->arpcom.ac_enaddr,
ETHER_ADDR_LEN);
@@ -1051,7 +1052,7 @@ sis_attach(struct device *parent, struct
sis_read_mac(sc, pa);
else
sis_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
- SIS_EE_NODEADDR, 3, 0);
+ SIS_EE_NODEADDR, 3, 1);
break;
}
@@ -1176,8 +1177,8 @@ sis_ring_init(struct sis_softc *sc)
nexti = i + 1;
ld->sis_tx_list[i].sis_nextdesc = &ld->sis_tx_list[nexti];
ld->sis_tx_list[i].sis_next =
- sc->sc_listmap->dm_segs[0].ds_addr +
- offsetof(struct sis_list_data, sis_tx_list[nexti]);
+ htole32(sc->sc_listmap->dm_segs[0].ds_addr +
+ offsetof(struct sis_list_data, sis_tx_list[nexti]));
ld->sis_tx_list[i].sis_mbuf = NULL;
ld->sis_tx_list[i].sis_ptr = 0;
ld->sis_tx_list[i].sis_ctl = 0;
@@ -1192,8 +1193,8 @@ sis_ring_init(struct sis_softc *sc)
nexti = i + 1;
ld->sis_rx_list[i].sis_nextdesc = &ld->sis_rx_list[nexti];
ld->sis_rx_list[i].sis_next =
- sc->sc_listmap->dm_segs[0].ds_addr +
- offsetof(struct sis_list_data, sis_rx_list[nexti]);
+ htole32(sc->sc_listmap->dm_segs[0].ds_addr +
+ offsetof(struct sis_list_data, sis_rx_list[nexti]));
ld->sis_rx_list[i].sis_ctl = 0;
}
@@ -1253,8 +1254,8 @@ sis_newbuf(struct sis_softc *sc, struct
BUS_DMASYNC_PREREAD);
c->sis_mbuf = m_new;
- c->sis_ptr = c->map->dm_segs[0].ds_addr;
- c->sis_ctl = ETHER_MAX_DIX_LEN;
+ c->sis_ptr = htole32(c->map->dm_segs[0].ds_addr);
+ c->sis_ctl = htole32(ETHER_MAX_DIX_LEN);
bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
((caddr_t)c - sc->sc_listkva), sizeof(struct sis_desc),
@@ -1287,7 +1288,7 @@ sis_rxeof(struct sis_softc *sc)
if (!SIS_OWNDESC(cur_rx))
break;
- rxstat = cur_rx->sis_rxstat;
+ rxstat = letoh32(cur_rx->sis_rxstat);
m = cur_rx->sis_mbuf;
cur_rx->sis_mbuf = NULL;
total_len = SIS_RXBYTES(cur_rx);
@@ -1364,7 +1365,7 @@ void
sis_txeof(struct sis_softc *sc)
{
struct ifnet *ifp;
- u_int32_t idx;
+ u_int32_t idx, ctl, txstat;
ifp = &sc->arpcom.ac_if;
@@ -1384,19 +1385,22 @@ sis_txeof(struct sis_softc *sc)
if (SIS_OWNDESC(cur_tx))
break;
- if (cur_tx->sis_ctl & SIS_CMDSTS_MORE)
+ ctl = letoh32(cur_tx->sis_ctl);
+
+ if (ctl & SIS_CMDSTS_MORE)
continue;
- if (!(cur_tx->sis_ctl & SIS_CMDSTS_PKT_OK)) {
+ txstat = letoh32(cur_tx->sis_txstat);
+
+ if (!(ctl & SIS_CMDSTS_PKT_OK)) {
ifp->if_oerrors++;
- if (cur_tx->sis_txstat & SIS_TXSTAT_EXCESSCOLLS)
+ if (txstat & SIS_TXSTAT_EXCESSCOLLS)
ifp->if_collisions++;
- if (cur_tx->sis_txstat & SIS_TXSTAT_OUTOFWINCOLL)
+ if (txstat & SIS_TXSTAT_OUTOFWINCOLL)
ifp->if_collisions++;
}
- ifp->if_collisions +=
- (cur_tx->sis_txstat & SIS_TXSTAT_COLLCNT) >> 16;
+ ifp->if_collisions += (txstat & SIS_TXSTAT_COLLCNT) >> 16;
ifp->if_opackets++;
if (cur_tx->map->dm_nsegs != 0) {
@@ -1542,10 +1546,10 @@ sis_encap(struct sis_softc *sc, struct m
if ((SIS_TX_LIST_CNT - (sc->sis_cdata.sis_tx_cnt + i)) < 2)
return(ENOBUFS);
f = &sc->sis_ldata->sis_tx_list[frag];
- f->sis_ctl = SIS_CMDSTS_MORE | map->dm_segs[i].ds_len;
- f->sis_ptr = map->dm_segs[i].ds_addr;
+ f->sis_ctl = htole32(SIS_CMDSTS_MORE | map->dm_segs[i].ds_len);
+ f->sis_ptr = htole32(map->dm_segs[i].ds_addr);
if (i != 0)
- f->sis_ctl |= SIS_CMDSTS_OWN;
+ f->sis_ctl |= htole32(SIS_CMDSTS_OWN);
cur = frag;
SIS_INC(frag, SIS_TX_LIST_CNT);
}
@@ -1554,8 +1558,8 @@ sis_encap(struct sis_softc *sc, struct m
BUS_DMASYNC_PREWRITE);
sc->sis_ldata->sis_tx_list[cur].sis_mbuf = m_head;
- sc->sis_ldata->sis_tx_list[cur].sis_ctl &= ~SIS_CMDSTS_MORE;
- sc->sis_ldata->sis_tx_list[*txidx].sis_ctl |= SIS_CMDSTS_OWN;
+ sc->sis_ldata->sis_tx_list[cur].sis_ctl &= ~htole32(SIS_CMDSTS_MORE);
+ sc->sis_ldata->sis_tx_list[*txidx].sis_ctl |= htole32(SIS_CMDSTS_OWN);
sc->sis_cdata.sis_tx_cnt += i;
*txidx = frag;
@@ -1655,23 +1659,23 @@ sis_init(void *xsc)
if (sc->sis_type == SIS_TYPE_83815) {
CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR0);
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
- ((u_int16_t *)sc->arpcom.ac_enaddr)[0]);
+ htole16(((u_int16_t *)sc->arpcom.ac_enaddr)[0]));
CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR1);
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
- ((u_int16_t *)sc->arpcom.ac_enaddr)[1]);
+ htole16(((u_int16_t *)sc->arpcom.ac_enaddr)[1]));
CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR2);
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
- ((u_int16_t *)sc->arpcom.ac_enaddr)[2]);
+ htole16(((u_int16_t *)sc->arpcom.ac_enaddr)[2]));
} else {
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR0);
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
- ((u_int16_t *)sc->arpcom.ac_enaddr)[0]);
+ htole16(((u_int16_t *)sc->arpcom.ac_enaddr)[0]));
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR1);
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
- ((u_int16_t *)sc->arpcom.ac_enaddr)[1]);
+ htole16(((u_int16_t *)sc->arpcom.ac_enaddr)[1]));
CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR2);
CSR_WRITE_4(sc, SIS_RXFILT_DATA,
- ((u_int16_t *)sc->arpcom.ac_enaddr)[2]);
+ htole16(((u_int16_t *)sc->arpcom.ac_enaddr)[2]));
}
/* Init circular TX/RX lists. */
Index: if_sisreg.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_sisreg.h,v
retrieving revision 1.30
diff -u -p -r1.30 if_sisreg.h
--- if_sisreg.h 4 Jun 2009 18:12:56 -0000 1.30
+++ if_sisreg.h 15 Jul 2009 21:12:40 -0000
@@ -340,10 +340,11 @@ struct sis_desc {
#define SIS_CMDSTS_MORE 0x40000000
#define SIS_CMDSTS_OWN 0x80000000
-#define SIS_LASTDESC(x) (!((x)->sis_ctl & SIS_CMDSTS_MORE)))
-#define SIS_OWNDESC(x) ((x)->sis_ctl & SIS_CMDSTS_OWN)
+#define SIS_LASTDESC(x) (!(letoh32((x)->sis_ctl) &
SIS_CMDSTS_MORE)))
+#define SIS_OWNDESC(x) (letoh32((x)->sis_ctl) & SIS_CMDSTS_OWN)
#define SIS_INC(x, y) (x) = ((x) == ((y)-1)) ? 0 : (x)+1
-#define SIS_RXBYTES(x) (((x)->sis_ctl & SIS_CMDSTS_BUFLEN) -
ETHER_CRC_LEN)
+#define SIS_RXBYTES(x) \
+ ((letoh32((x)->sis_ctl) & SIS_CMDSTS_BUFLEN) - ETHER_CRC_LEN)
#define SIS_RXSTAT_COLL 0x00010000
#define SIS_RXSTAT_LOOPBK 0x00020000
