The following diff adds support for the Broadcom BCM5717 ASIC and
the BCM5717 / BCM5718 chipsets.
Index: if_bge.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_bge.c,v
retrieving revision 1.284
diff -u -p -r1.284 if_bge.c
--- if_bge.c 7 Oct 2009 22:05:51 -0000 1.284
+++ if_bge.c 7 Oct 2009 23:12:49 -0000
@@ -240,6 +241,10 @@ const struct pci_matchid bge_devices[] =
{ PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5714S },
{ PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5715 },
{ PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5715S },
+ { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5717C },
+ { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5717S },
+ { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5718C },
+ { PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5718S },
{ PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5720 },
{ PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5721 },
{ PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5722 },
@@ -395,6 +400,7 @@ static const struct bge_revision bge_maj
{ BGE_ASICREV_BCM5787, "unknown BCM5754/5787" },
{ BGE_ASICREV_BCM5906, "unknown BCM5906" },
{ BGE_ASICREV_BCM57780, "unknown BCM57780" },
+ { BGE_ASICREV_BCM5717, "unknown BCM5717" },
{ 0, NULL }
};
@@ -1340,7 +1352,8 @@ bge_blockinit(struct bge_softc *sc)
/* Configure mbuf pool watermarks */
/* new Broadcom docs strongly recommend these: */
- if (BGE_IS_5705_PLUS(sc)) {
+ if (BGE_IS_5705_PLUS(sc) &&
+ BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5717) {
CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906) {
@@ -1397,7 +1410,10 @@ bge_blockinit(struct bge_softc *sc)
/* Initialize the standard RX ring control block */
rcb = &sc->bge_rdata->bge_info.bge_std_rx_rcb;
BGE_HOSTADDR(rcb->bge_hostaddr, BGE_RING_DMA_ADDR(sc, bge_rx_std_ring));
- if (BGE_IS_5705_PLUS(sc))
+ if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717)
+ rcb->bge_maxlen_flags = (BGE_RCB_MAXLEN_FLAGS(512, 0) |
+ (ETHER_MAX_DIX_LEN << 2));
+ else if (BGE_IS_5705_PLUS(sc))
rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(512, 0);
else
rcb->bge_maxlen_flags =
@@ -1456,6 +1472,11 @@ bge_blockinit(struct bge_softc *sc)
CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, 8);
CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, 8);
+ if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717) {
+ CSR_WRITE_4(sc, BGE_STD_REPL_LWM, 4);
+ CSR_WRITE_4(sc, BGE_JUMBO_REPL_LWM, 4);
+ }
+
/*
* Disable all unused send rings by setting the 'ring disabled'
* bit in the flags field of all the TX send ring control blocks.
@@ -1825,8 +1846,15 @@ bge_attach(struct device *parent, struct
>> BGE_PCIMISCCTL_ASICREV_SHIFT);
if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_USE_PRODID_REG) {
- sc->bge_chipid = pci_conf_read(pc, pa->pa_tag,
- BGE_PCI_PRODID_ASICREV);
+ if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM5717C ||
+ PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM5717S ||
+ PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM5717C ||
+ PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM5717S)
+ sc->bge_chipid = pci_conf_read(pc, pa->pa_tag,
+ BGE_PCI_GEN2_PRODID_ASICREV);
+ else
+ sc->bge_chipid = pci_conf_read(pc, pa->pa_tag,
+ BGE_PCI_PRODID_ASICREV);
}
printf(", ");
@@ -1878,7 +1906,8 @@ bge_attach(struct device *parent, struct
sc->bge_flags |= BGE_5714_FAMILY;
/* Intentionally exclude BGE_ASICREV_BCM5906 */
- if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
+ if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717 ||
+ BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5761 ||
BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5784 ||
BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5785 ||
@@ -1958,6 +1987,7 @@ bge_attach(struct device *parent, struct
if ((BGE_IS_5705_PLUS(sc)) &&
BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5906 &&
+ BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5717 &&
BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5785 &&
BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM57780) {
if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
@@ -2411,7 +2450,9 @@ bge_reset(struct bge_softc *sc)
}
if (sc->bge_flags & BGE_PCIE &&
- sc->bge_chipid != BGE_CHIPID_BCM5750_A0) {
+ sc->bge_chipid != BGE_CHIPID_BCM5750_A0 &&
+ BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5717 &&
+ BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5785) {
u_int32_t v;
/* Enable PCI Express bug fix */
Index: if_bgereg.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_bgereg.h,v
retrieving revision 1.98
diff -u -p -r1.98 if_bgereg.h
--- if_bgereg.h 21 Jul 2009 13:09:41 -0000 1.98
+++ if_bgereg.h 6 Oct 2009 23:11:45 -0000
@@ -209,6 +209,7 @@
#define BGE_PCI_ISR_MBX_HI 0xB0
#define BGE_PCI_ISR_MBX_LO 0xB4
#define BGE_PCI_PRODID_ASICREV 0xBC
+#define BGE_PCI_GEN2_PRODID_ASICREV 0xF4
/* XXX:
* Used in PCI-Express code for 575x chips.
@@ -324,6 +325,7 @@
#define BGE_ASICREV_BCM5784 0x5784
#define BGE_ASICREV_BCM5785 0x5785
#define BGE_ASICREV_BCM57780 0x57780
+#define BGE_ASICREV_BCM5717 0x5717
/* chip revisions */
#define BGE_CHIPREV(x) ((x) >> 8)
@@ -1243,6 +1245,9 @@
#define BGE_RBDI_STD_REPL_THRESH 0x2C18
#define BGE_RBDI_JUMBO_REPL_THRESH 0x2C1C
+#define BGE_STD_REPL_LWM 0x2D00
+#define BGE_JUMBO_REPL_LWM 0x2D04
+
/* Receive BD Initiator Mode register */
#define BGE_RBDIMODE_RESET 0x00000001
#define BGE_RBDIMODE_ENABLE 0x00000002
@@ -2098,6 +2103,7 @@ struct bge_tx_bd {
#define BGE_TXBDFLAG_IP_CSUM 0x0002
#define BGE_TXBDFLAG_END 0x0004
#define BGE_TXBDFLAG_IP_FRAG 0x0008
+#define BGE_TXBDFLAG_JMB_PKT 0x0008
#define BGE_TXBDFLAG_IP_FRAG_END 0x0010
#define BGE_TXBDFLAG_VLAN_TAG 0x0040
#define BGE_TXBDFLAG_COAL_NOW 0x0080
--
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