Which ones should people tests?

Should I assume _all of them_ ... since you probably tested zero yourself?

Can you please report the ones you yourself tested on, before asking others
to invest time?

> On Sat, Apr 10, 2010 at 04:58:36PM -0400, Brad wrote:
> > Please test the following diff with any bge(4) adapters. Just checking to
> > ensure no regressions with known working adapters. Just check that things
> > are working as usual. Just bringing in some fixes for some of the newer
> > chipsets soon to appear. Nothing changed with existing chipsets though.
> 
> oops. there was a typo in the original diff. please test this revision.
> 
> 
> Index: if_bge.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/if_bge.c,v
> retrieving revision 1.293
> diff -u -p -r1.293 if_bge.c
> --- if_bge.c  6 Apr 2010 15:27:51 -0000       1.293
> +++ if_bge.c  17 Apr 2010 03:32:24 -0000
> @@ -1352,9 +1352,12 @@ bge_blockinit(struct bge_softc *sc)
>  
>       /* Configure mbuf pool watermarks */
>       /* new Broadcom docs strongly recommend these: */
> -     if (BGE_IS_5705_PLUS(sc) &&
> -         BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5717 &&
> -         BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM57765) {
> +     if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717 ||
> +         BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57765) {
> +             CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
> +             CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x2a);
> +             CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0xa0);
> +     } else if (BGE_IS_5705_PLUS(sc)) {
>               CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
>  
>               if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906) {
> @@ -1660,11 +1663,17 @@ bge_blockinit(struct bge_softc *sc)
>       if (BGE_IS_5755_PLUS(sc))
>               val |= BGE_WDMAMODE_STATUS_TAG_FIX;
>  
> +     if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5785)
> +             val |= BGE_WDMAMODE_BURST_ALL_DATA;
> +
>       /* Turn on write DMA state machine */
>       CSR_WRITE_4(sc, BGE_WDMA_MODE, val);
>  
>       val = BGE_RDMAMODE_ENABLE|BGE_RDMAMODE_ALL_ATTNS;
>  
> +     if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717)
> +             val |= BGE_RDMAMODE_MULT_DMA_RD_DIS;
> +
>       if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5784 ||
>           BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5785 ||
>           BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57780)
> @@ -2116,10 +2125,12 @@ bge_attach(struct device *parent, struct
>       sc->bge_tx_max_coal_bds = 400;
>  
>       /* 5705 limits RX return ring to 512 entries. */
> -     if (BGE_IS_5705_PLUS(sc))
> -             sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
> -     else
> +     if (BGE_IS_5700_FAMILY(sc) ||
> +         BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717 ||
> +         BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57765)
>               sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT;
> +     else
> +             sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
>  
>       /* Set up ifnet structure */
>       ifp = &sc->arpcom.ac_if;
> @@ -2188,7 +2199,8 @@ bge_attach(struct device *parent, struct
>       /* The SysKonnect SK-9D41 is a 1000baseSX card. */
>       if (PCI_PRODUCT(subid) == SK_SUBSYSID_9D41 ||
>           (hwcfg & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER) {
> -             if (BGE_IS_5714_FAMILY(sc))
> +             if (BGE_IS_5714_FAMILY(sc) ||
> +                 BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5717)
>                   sc->bge_flags |= BGE_PHY_FIBER_MII;
>               else
>                   sc->bge_flags |= BGE_PHY_FIBER_TBI;
> Index: if_bgereg.h
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/if_bgereg.h,v
> retrieving revision 1.100
> diff -u -p -r1.100 if_bgereg.h
> --- if_bgereg.h       9 Jan 2010 06:19:01 -0000       1.100
> +++ if_bgereg.h       17 Apr 2010 03:32:24 -0000
> @@ -1517,6 +1517,7 @@
>  #define BGE_RDMAMODE_MBUF_SBD_CRPT_ATTN      0x00002000
>  #define BGE_RDMAMODE_FIFO_SIZE_128   0x00020000
>  #define BGE_RDMAMODE_FIFO_LONG_BURST 0x00030000
> +#define BGE_RDMAMODE_MULT_DMA_RD_DIS 0x01000000
>  
>  /* Read DMA status register */
>  #define BGE_RDMASTAT_PCI_TGT_ABRT_ATTN       0x00000004
> @@ -1548,6 +1549,7 @@
>  #define BGE_WDMAMODE_ALL_ATTNS               0x000003FC
>  #define BGE_WDMAMODE_RX_ACCEL                0x00000400
>  #define BGE_WDMAMODE_STATUS_TAG_FIX  0x20000000
> +#define BGE_WDMAMODE_BURST_ALL_DATA  0xc0000000
>  
>  /* Write DMA status register */
>  #define BGE_WDMASTAT_PCI_TGT_ABRT_ATTN       0x00000004
> 
> -- 
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