On Sat, Oct 09, 2010 at 01:11:05PM -0700, Philip Guenther wrote: > The diff below is the first step in a clean up of the amd64 low-level > segment bits. This step is to switch user-space to using code and data > segments in the global descriptor table (GDT) instead of the local > descriptor table (LDT) and to eliminate the GDT slots that we don't > actually use. > > After this diff, all that remains in the LDT is unused segments and gates > for COMPAT_* stuff that was removed months ago, so the next diff will be > to remove all that LDT crap. After that comes changes to eliminate the > unnecessary TSS-per-process stuff, which will eliminate the current > design's limit of 4k processes. > > This diff shouldn't have any visible effect. Confirmation from people > running both AMD and Intel parts would be good. > > > Philip Guenther
No issues seen during a full build cycle on my cpu0: AMD Phenom(tm) II X6 1055T Processor, 2813.14 MHz box. .... Ken
