this moves knowledge of where the inbound doorbell on chips is out
of code and into the structure that stores the chip differences.
ive tested this on a perc5 (which is the xscale gen). id like a
skinny user to give it a spin too.
Index: mfi.c
===================================================================
RCS file: /cvs/src/sys/dev/ic/mfi.c,v
retrieving revision 1.122
diff -u -p -r1.122 mfi.c
--- mfi.c 12 Jan 2012 06:12:30 -0000 1.122
+++ mfi.c 10 Aug 2012 07:04:58 -0000
@@ -118,7 +118,8 @@ static const struct mfi_iop_ops mfi_iop_
mfi_xscale_fw_state,
mfi_xscale_intr_ena,
mfi_xscale_intr,
- mfi_xscale_post
+ mfi_xscale_post,
+ MFI_IDB
};
u_int32_t mfi_ppc_fw_state(struct mfi_softc *);
@@ -130,7 +131,8 @@ static const struct mfi_iop_ops mfi_iop_
mfi_ppc_fw_state,
mfi_ppc_intr_ena,
mfi_ppc_intr,
- mfi_ppc_post
+ mfi_ppc_post,
+ MFI_IDB
};
u_int32_t mfi_gen2_fw_state(struct mfi_softc *);
@@ -142,7 +144,8 @@ static const struct mfi_iop_ops mfi_iop_
mfi_gen2_fw_state,
mfi_gen2_intr_ena,
mfi_gen2_intr,
- mfi_gen2_post
+ mfi_gen2_post,
+ MFI_IDB
};
u_int32_t mfi_skinny_fw_state(struct mfi_softc *);
@@ -154,7 +157,8 @@ static const struct mfi_iop_ops mfi_iop_
mfi_skinny_fw_state,
mfi_skinny_intr_ena,
mfi_skinny_intr,
- mfi_skinny_post
+ mfi_skinny_post,
+ MFI_SKINNY_IDB
};
#define mfi_fw_state(_s) ((_s)->sc_iop->mio_fw_state(_s))
@@ -362,6 +366,7 @@ mfi_transition_firmware(struct mfi_softc
{
int32_t fw_state, cur_state;
int max_wait, i;
+ bus_size_t idb = sc->sc_iop->mio_idb;
fw_state = mfi_fw_state(sc) & MFI_STATE_MASK;
@@ -378,17 +383,11 @@ mfi_transition_firmware(struct mfi_softc
printf("%s: firmware fault\n", DEVNAME(sc));
return (1);
case MFI_STATE_WAIT_HANDSHAKE:
- if (sc->sc_flags & MFI_IOP_SKINNY)
- mfi_write(sc, MFI_SKINNY_IDB,
MFI_INIT_CLEAR_HANDSHAKE);
- else
- mfi_write(sc, MFI_IDB,
MFI_INIT_CLEAR_HANDSHAKE);
+ mfi_write(sc, idb, MFI_INIT_CLEAR_HANDSHAKE);
max_wait = 2;
break;
case MFI_STATE_OPERATIONAL:
- if (sc->sc_flags & MFI_IOP_SKINNY)
- mfi_write(sc, MFI_SKINNY_IDB, MFI_INIT_READY);
- else
- mfi_write(sc, MFI_IDB, MFI_INIT_READY);
+ mfi_write(sc, idb, MFI_INIT_READY);
max_wait = 10;
break;
case MFI_STATE_UNDEFINED:
Index: mfivar.h
===================================================================
RCS file: /cvs/src/sys/dev/ic/mfivar.h,v
retrieving revision 1.42
diff -u -p -r1.42 mfivar.h
--- mfivar.h 12 Jan 2012 06:12:30 -0000 1.42
+++ mfivar.h 10 Aug 2012 07:04:58 -0000
@@ -104,6 +104,7 @@ struct mfi_iop_ops {
void (*mio_intr_ena)(struct mfi_softc *);
int (*mio_intr)(struct mfi_softc *);
void (*mio_post)(struct mfi_softc *, struct mfi_ccb *);
+ bus_size_t mio_idb;
};
struct mfi_softc {
