On 09/12/12 17:48, Marc Espie wrote:
Consider the common makefile idiom:
a:
# cmd that builds a
@cmd
The # line is actually a comment for the shell, that will be echo'd,
and then passed to a new shell... which does nothing with it.
I'm wondering if there are any ways (possibly using \ or stuff like that)
that there could be an actual command that starts with a #, and then
would be passed to a shell, and actually get the shell to do something.
Baring that, the job executor in make can simply echo those #lines and
skip the expensive "fork a shell to do nothing" part...
(I mostly know what our make does, I'm wondering if posix has some ways
where this could start things, or some other make like solaris/free/net.
and if we want it.)
$ cat Makefile
comment:
# ${COMMENT}
$ make COMMENT="$(echo "comment\necho and a sneaky command")" comment
# comment
echo and a sneaky command
and a sneaky command
/Alexander