On 09/16/13 19:29, Jonathan Matthew wrote:
Here's the rest of the changes required to get ethernet working on the
edgerouter lite, which makes it possible to boot off nfsroot and do exciting
stuff like build kernels.

- add atphy(4) to configs
- allow separate rx and tx clock settings
- add phy mapping for erl
- add tx/rx clock settings for erl

ok?


No. This breaks the RAMDISK (tested on CAM-0100). Log at the bottom of this email from the CAM-0100 (and attached as a tarball too because I don't trust Thunderbird). Note that everything else works except for the RAMDISK. The GENERIC kernel works great on the CAM-0100 and ERL and everything works as expected on both machines with GENERIC.

Also, the panic still occurs if you remove the atphy* line from RAMDISK.

Can someone else who has a CAM-0100 double check to make sure it's not just me, since I'd love to have this go in.

~Brian

Copyright (c) 1982, 1986, 1989, 1991, 1993
         The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2013 OpenBSD. All rights reserved.  http://www.OpenBSD.org

OpenBSD 5.4-current (GENERIC) #29: Tue Sep 17 08:07:14 EST 2013
     r...@cantrip.eait.uq.edu.au:/usr/src/sys/arch/octeon/compile/GENERIC
real mem = 247922688 (236MB)
avail mem = 245612544 (234MB)
mainbus0 at root
cpu0 at mainbus0: Cavium OCTEON CPU rev 0.1 500 MHz, Software FP emulation
cpu0: cache L1-I 32KB D 16KB 4 way, L2 128KB direct
clock0 at mainbus0: int 5
iobus0 at mainbus0
octcf at iobus0 base 0x1d000800 irq 0 not configured
pcibus at iobus0 irq 0 not configured
cn30xxgmx0 at iobus0 base 0x1180008000000 irq 48
cnmac0 at cn30xxgmx0 address=0x0001180008000000: RGMII, address 
dc:9f:db:29:40:2f
atphy0 at cnmac0 phy 7: F1 10/100/1000 PHY, rev. 2
cnmac1 at cn30xxgmx0 address=0x0001180008000000: RGMII, address 
dc:9f:db:29:40:30
atphy1 at cnmac1 phy 6: F1 10/100/1000 PHY, rev. 2
cnmac2 at cn30xxgmx0 address=0x0001180008000000: RGMII, address 
dc:9f:db:29:40:31
atphy2 at cnmac2 phy 5: F1 10/100/1000 PHY, rev. 2
uar: ns16550, no working fifo
com0: console
com1 at uartbus0 base 0x1180000000c00 irq 35: ns16550, no working fifo
/dev/ksyms: Symbol table not valid.
vscsi0 at root
scsibus0 at vscsi0: 256 targets
softraid0 at root
scsibus1 at softraid0: 256 targets
root device: cnmac0
nfs_boot: using interface cnmac0, with revarp & bootparams
cnmac0: link up (1000baseT-FDX)
cnmac0: link down
cnmac0: link up (1000baseT-FDX)
nfs_boot: client_addr=192.168.1.2
nfs_boot: server_addr=192.168.1.22 hostname=erl
root on 192.168.1.22:/srv/octeon-nfsroot
WARNING: No TOD clock, believing file system.
WARNING: CHECK AND RESET THE DATE!
swap on 192.168.1.22:/srv/octeon-nfsswap



Index: arch/octeon/conf/GENERIC
===================================================================
RCS file: /cvs/src/sys/arch/octeon/conf/GENERIC,v
retrieving revision 1.9
diff -u -p -r1.9 GENERIC
--- arch/octeon/conf/GENERIC    24 Jun 2011 02:18:17 -0000      1.9
+++ arch/octeon/conf/GENERIC    16 Sep 2013 22:50:31 -0000
@@ -44,6 +44,7 @@ cnmac*                at cn30xxgmx?
rgephy* at mii?
  ukphy*                at mii?
+atphy*         at mii?
# IDE Controller
  pciide*               at pci? flags 0x0000
Index: arch/octeon/conf/RAMDISK
===================================================================
RCS file: /cvs/src/sys/arch/octeon/conf/RAMDISK,v
retrieving revision 1.11
diff -u -p -r1.11 RAMDISK
--- arch/octeon/conf/RAMDISK    26 Mar 2013 14:23:19 -0000      1.11
+++ arch/octeon/conf/RAMDISK    16 Sep 2013 22:50:31 -0000
@@ -64,6 +64,7 @@ cnmac*                at cn30xxgmx?
rgephy* at mii?
  ukphy*                at mii?
+atphy*         at mii?
pseudo-device loop 1 # network loopback
  pseudo-device bpfilter        1       # packet filter
Index: arch/octeon/dev/cn30xxasx.c
===================================================================
RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxasx.c,v
retrieving revision 1.3
diff -u -p -r1.3 cn30xxasx.c
--- arch/octeon/dev/cn30xxasx.c 5 Dec 2012 23:20:14 -0000       1.3
+++ arch/octeon/dev/cn30xxasx.c 16 Sep 2013 22:50:31 -0000
@@ -175,10 +175,10 @@ cn30xxasx_enable_intr(struct cn30xxasx_s
  #endif
int
-cn30xxasx_clk_set(struct cn30xxasx_softc *sc, int setting)
+cn30xxasx_clk_set(struct cn30xxasx_softc *sc, int tx_setting, int rx_setting)
  {
-       _ASX_WR8(sc, ASX0_TX_CLK_SET0_OFFSET + 8 * sc->sc_port, setting);
-       _ASX_WR8(sc, ASX0_RX_CLK_SET0_OFFSET + 8 * sc->sc_port, setting);
+       _ASX_WR8(sc, ASX0_TX_CLK_SET0_OFFSET + 8 * sc->sc_port, tx_setting);
+       _ASX_WR8(sc, ASX0_RX_CLK_SET0_OFFSET + 8 * sc->sc_port, rx_setting);
        return 0;
  }
Index: arch/octeon/dev/cn30xxasxvar.h
===================================================================
RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxasxvar.h,v
retrieving revision 1.1
diff -u -p -r1.1 cn30xxasxvar.h
--- arch/octeon/dev/cn30xxasxvar.h      16 Jun 2011 11:22:30 -0000      1.1
+++ arch/octeon/dev/cn30xxasxvar.h      16 Sep 2013 22:50:31 -0000
@@ -50,7 +50,7 @@ struct cn30xxasx_attach_args {
  void                  cn30xxasx_init(struct cn30xxasx_attach_args *,
                            struct cn30xxasx_softc **);
  int                   cn30xxasx_enable(struct cn30xxasx_softc *, int);
-int                    cn30xxasx_clk_set(struct cn30xxasx_softc *, int);
+int                    cn30xxasx_clk_set(struct cn30xxasx_softc *, int, int);
  uint64_t              cn30xxasx_int_summary(struct cn30xxasx_softc *sc);
#endif
Index: arch/octeon/dev/cn30xxgmx.c
===================================================================
RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxgmx.c,v
retrieving revision 1.6
diff -u -p -r1.6 cn30xxgmx.c
--- arch/octeon/dev/cn30xxgmx.c 16 Sep 2013 20:52:13 -0000      1.6
+++ arch/octeon/dev/cn30xxgmx.c 16 Sep 2013 22:50:31 -0000
@@ -41,6 +41,7 @@
#include <machine/bus.h>
  #include <machine/octeon_model.h>
+#include <machine/octeonvar.h>
#include <octeon/dev/iobusvar.h>
  #include <octeon/dev/cn30xxciureg.h>
@@ -190,9 +191,19 @@ cn30xxgmx_match(struct device *parent, v
  static int
  cn30xxgmx_port_phy_addr(int port)
  {
-       if (port >= nitems(octeon_eth_phy_table))
-               return -1;
-       return octeon_eth_phy_table[port];
+       extern struct boot_info *octeon_boot_info;
+
+       switch (octeon_boot_info->board_type) {
+       case BOARD_TYPE_UBIQUITI_E100:
+               if (port > 2)
+                       return -1;
+               return 7 - port;
+
+       default:
+               if (port >= nitems(octeon_eth_phy_table))
+                       return -1;
+               return octeon_eth_phy_table[port];
+       }
  }
static void
@@ -977,7 +988,9 @@ cn30xxgmx_rgmii_speed_speed(struct cn30x
  static int
  cn30xxgmx_rgmii_timing(struct cn30xxgmx_port_softc *sc)
  {
-       int clk_set_setting;
+       extern struct boot_info *octeon_boot_info;
+       int clk_tx_setting;
+       int clk_rx_setting;
        uint64_t rx_frm_ctl;
/* RGMII TX Threshold Registers, CN30XX-HM-1.0;
@@ -1022,15 +1035,25 @@ cn30xxgmx_rgmii_timing(struct cn30xxgmx_
                /*
                 * Table.4-6, Summary of ASX Registers, SEIL_HS_v03;
                 */
-               clk_set_setting = 0;
+               clk_tx_setting = 0;
+               clk_rx_setting = 0;
                break;
        default:
                /* Default parameter of CN30XX */
-               clk_set_setting = 24;
+               clk_tx_setting = 24;
+               clk_rx_setting = 24;
+               break;
+       }
+       
+       /* board specific overrides */
+       switch (octeon_boot_info->board_type) {
+       case BOARD_TYPE_UBIQUITI_E100:
+               clk_tx_setting = 16;
+               clk_rx_setting = 0;
                break;
        }
- cn30xxasx_clk_set(sc->sc_port_asx, clk_set_setting);
+       cn30xxasx_clk_set(sc->sc_port_asx, clk_tx_setting, clk_rx_setting);
return 0;
  }

Octeon capk-0100nd# bootoctlinux
ELF file is 64 bit
Attempting to allocate memory for ELF segment: addr: 0xffffffff81000000 (adjusted to: 0x0000000001000000), size 0x71d540
Allocated memory for ELF segment: addr: 0xffffffff81000000, size 0x71d540
Processing PHDR 0
  Loading 6a20a0 bytes at ffffffff81000000
  Clearing 7b4a0 bytes at ffffffff816a20a0
## Loading Linux kernel with entry point: 0xffffffff81000000 ...
Bootloader: Done loading app on coremask: 0x1
Total DRAM Size 0x0000000020000000
Bank 0 = 0x0000000001720000   ->  0x000000000FFFFFFF
mem_layout[0] page 0x00000000000005C8 -> 0x0000000000003FFF
Initial setup done, switching console.
boot_desc->desc_ver:7
boot_desc->desc_size:400
boot_desc->stack_top:0
boot_desc->heap_start:0
boot_desc->heap_end:0
boot_desc->argc:1
boot_desc->flags:5
boot_desc->core_mask:1
boot_desc->dram_size:512
boot_desc->phy_mem_desc_addr:c0ed8
boot_desc->debugger_flag_addr:a28
boot_desc->eclock:500000000
boot_desc->boot_info_addr:1001e0
boot_info->ver_major:1
boot_info->ver_minor:2
boot_info->stack_top:0
boot_info->heap_start:0
boot_info->heap_end:0
boot_info->boot_desc_addr:0
boot_info->exception_base_addr:1000
boot_info->stack_size:0
boot_info->flags:5
boot_info->core_mask:1
boot_info->dram_size:512
boot_info->phys_mem_desc_addr:c0ed8
boot_info->debugger_flags_addr:0
boot_info->eclock:500000000
boot_info->dclock:265000000
boot_info->board_type:11
boot_info->board_rev_major:0
boot_info->board_rev_minor:0
boot_info->mac_addr_count:3
boot_info->cf_common_addr:1d000800
boot_info->cf_attr_addr:1d010000
boot_info->led_display_addr:1d0200f8
boot_info->dfaclock:0
boot_info->config_flags:9
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2013 OpenBSD. All rights reserved. http://www.OpenBSD.org

OpenBSD 5.4-current (RAMDISK) #2: Mon Sep 16 22:20:30 EDT 2013
bcal...@shasta.anthrobsd.net:/usr/src/sys/arch/octeon/compile/RAMDISK
real mem = 244170752 (232MB)
avail mem = 241893376 (230MB)
mainbus0 at root
cpu0 at mainbus0: Cavium OCTEON CPU rev 0.1 500 MHz, Software FP emulation
cpu0: cache L1-I 32KB D 16KB 4 way, L2 128KB direct
clock0 at mainbus0: int 5
iobus0 at mainbus0
octcf0 at iobus0 base 0x1d000800 irq 0: <TS8GCF133>
octcf0: 1-sector PIO, CHS, 7647MB, 15538 cyl, 16 head, 63 sec, 15662304 sectors
pcibus0 at iobus0 irq 0
pci0 at pcibus0 bus 0
0:0:0: mem address conflict 0xf8000000/0x8000000
"Cavium OCTEON Plus CN50XX" rev 0x01 at pci0 dev 0 function 0 not configured
pciide0 at pci0 dev 12 function 0 "CMD Technology SiI3512 SATA" rev 0x01: DMA
pciide0: using irq 36 for native-PCI interrupt
"Ralink RT2560" rev 0x01 at pci0 dev 14 function 0 not configured
cn30xxgmx0 at iobus0 base 0x1180008000000 irq 48
cnmac0 at cn30xxgmx0 address=0x0001180008000000: RGMII, address 00:90:fb:2f:b4:f1
rgephy0 at cnmac0 phy 2: RTL8169S/8110S PHY, rev. 2
cnmac1 at cn30xxgmx0 address=0x0001180008000000: RGMII, address 00:90:fb:2f:b4:f2
rgephy1 at cnmac1 phy 3: RTL8169S/8110S PHY, rev. 2
cnmac2 at cn30xxgmx0 address=0x0001180008000000: RGMII, address 00:90:fb:2f:b4:f3
rgephy2 at cnmac2 phy 34: RTL8169S/8110S PHY, rev. 2
uar: ns16550, no working fifo
com0: console
com1 at uartbus0 base 0x1180000000c00 irq 35: ns16550, no working fifo
root on rd0a swap on rd0b dump on rd0b
panic: cannot open disk, 0x800/0x1602, error 22
Stopped at      0xffffffff811288c4:     jr      ra
0xffffffff811288c8:      nop
RUN AT LEAST 'trace' AND 'ps' AND INCLUDE OUTPUT WHEN REPORTING THIS PANIC!
DO NOT EVEN BOTHER REPORTING THIS WITHOUT INCLUDING THAT INFORMATION!
ddb> trace
0xffffffff811288c0 (ffffffff816a1998,9001070000000200,200,1c00000001) ra 0xfff
fffff8104c95c sp 0x9800000001727cb0, sz 0
0xffffffff8104c850 (ffffffff816a1998,9001070000000200,200,1c00000001) ra 0x0 s
p 0x9800000001727cb0, sz 0
User-level: pid 0
ddb> ps
   PID   PPID   PGRP    UID  S       FLAGS  WAIT          COMMAND
     3      0      0      0  3    0x100200  bored         syswq
     2      0      0      0  1    0x100200                idle0
     1      0      0      0  3           0  initexec      swapper
*    0     -1      0      0  7       0x200                swapper
ddb> Connected (speed 115200)

[EOT]

Attachment: camfail.tgz
Description: Binary data

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