Am 11.10.2013 um 22:46 schrieb Artturi Alm <artturi....@gmail.com>:

> On 10/11/13 20:39, Markus Hennecke wrote:
>> On Sat, 5 Oct 2013, Artturi Alm wrote:
>> 
>>> Current version attached, extract to /sys/arch/armv7 and read the short
>>> notes file, no more out of allwinner/ patches needed thanks to armv7.
>>> 
>>> A20 support still needs a workaround under /sys/arch/arm/cortex/ which
>>> i didn't include as i think support is still 'subtly' broken anyway..
>>> And ahci is still not working for me, but there's a couple of
>>> new drivers included.
>>> Ethernet driver survived make build of userland with /usr/src mounted
>>> via nfs, fwiw.
>>> 
>>> Now this is totally usable for me as-is already, so any feedback is
>>> welcome, be it finding out possible bugs and/or confirming it's working.
>> 
>> Great work! I made a few changes to fix the timer code for the A20 CPU,
>> the diff to your code is attached. With this I am almost booting the
>> kernel on a cubieboard 2:
>> 
>> Copyright (c) 1982, 1986, 1989, 1991, 1993
>>         The Regents of the University of California.  All rights reserved.
>> Copyright (c) 1995-2013 OpenBSD. All rights reserved.  http://www.OpenBSD.org
>> 
>> OpenBSD 5.4-current (GENERIC-ALLWINNER) #22: Fri Oct 11 19:17:11 CEST 2013
>>     
>> mar...@antigone.markus-hennecke.de:/usr/src/sys/arch/armv7/compile/GENERIC-ALLWINNER
>> real mem  = 1073741824 (1024MB)
>> avail mem = 1040007168 (991MB)
>> mainbus0 at root
>> cortex0 at mainbus0
>> ampintc0 at cortex0 nirq 160
>> cpu0 at mainbus0: ARM Cortex A7 rev 4 (ARMv7 core)
>> cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
>> cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
>> allwinner0 at mainbus0: A20
>> awpio0 at allwinner0
>> awccmu0 at allwinner0
>> awtimer0 at allwinner0: tick rate 32KHz hz 100  stat rate 32KHz stathz 128   
>>   counter 24000 KHz
>> awdog0 at allwinner0
>> awrtc0 at allwinner0
>> awuart0 at allwinner0: console
>> awe0 at allwinner0
>> awe0: address 00:00:00:00:00:00
>> rlphy0 at awe0 phy 1: RTL8201L 10/100 PHY, rev. 1
>> ahci0 at allwinner0 GHC 0x80000000<AE> AHCI 1.1
>> ahci0: capabilities 
>> 0x6726ff80<NCQ,SSNTF,SALP,SAL,SCLO,SAM,SPM,PMD,SSC,PSC,CCCS>, 1 ports, 32 
>> cmds, gen 1 (1.5Gbps) and 2 (3Gbps)
>> ahci0: ports implemented: 0x00000001
>> ahci0.0: port reset
>> ahci0: no device detected on port 0
>> scsibus0 at ahci0: 32 targets
>> ehci0 at allwinner0
>> usb0 at ehci0: USB revision 2.0
>> uhub0 at usb0 "Allwinner EHCI root hub" rev 2.00/1.00 addr 1
>> ehci1 at allwinner0
>> usb1 at ehci1: USB revision 2.0
>> uhub1 at usb1 "Allwinner EHCI root hub" rev 2.00/1.00 addr 1
>> gpio0 at awpio0: 18 pins
>> gpio1 at awpio0: 24 pins
>> gpio2 at awpio0: 25 pins
>> gpio3 at awpio0: 28 pins
>> gpio4 at awpio0: 12 pins
>> gpio5 at awpio0: 6 pins
>> gpio6 at awpio0: 12 pins
>> gpio7 at awpio0: 28 pins
>> gpio8 at awpio0: 22 pins
>> /dev/ksyms: Symbol table not valid.
>> 
>> Here the output stops, I will look into that later. At this point I am
>> unable to figure out how to set the ethaddr in the u-boot version I am
>> using. setenv ethaddr xx:xx:xx:xx:xx:xx doesn't seem to have any effect.
>> 
>> Kind regards
>> Markus
>> 
> 
> Hi,
> 
> Thanks for the patch, it looks correct when compared to the user manual
> and shows how ugly sources may get when not paid enough attention,
> will fix the whitespaces there also. Note that Cortex-A7 should
> support agtimer found in arch/arm/cortex, which would allow cleaning
> up awtimer.c from the 'added on'-kind of hacks to support A20,
> priorities have kept me from trying that one out so far.
> 
> To allow it to boot further you would have to change ICP_ADDR and
> ICD_ADDR in ampintc, iirc. possibly 0x1000 and 0x2000 respectively,
> which is not the fix that would ever get commited even if allwinner
> would be on cvs, as it'll break Cortex-A9, and unfortunately, masking
> by cpu is not working option either, there is example of where it would
> fail already (exynos).
> FDT is the only clean solution i can think of, when there is priority on
> keeping arch/arm/cortex free of SoC-dependent code.

Exactly.  We have already talked and discussed that a lot. :)
There is no other way around it.

> 
> About ethaddr, have you tried pinging another host from u-boot?
> Does your u-boot support emac? the one i initially downloaded for
> cubieboard2 did not iirc., if you can boot the bsd.umg over network,
> and still get 00:00:00:00:00:00, i will power up my cb2 to fix awe,
> as it's so far untested on A20 afaik.

Maybe Allwinner stores the mac address in some magic register? i.MX6 does that.
u-boot might be able to push the "ethaddr env" using the FDT.

> 
> 
> -Artturi
> 


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