On Tue, Sep 02, 2014 at 07:20:30AM -0400, Brad Smith wrote:
> On Tue, Sep 02, 2014 at 06:28:48AM -0400, Brad Smith wrote:
> > Add some feature flags and store in the softc the various max Jumbo frame
> > sizes
> > for the different generations of chips. No behavioral change.
> >
> > Tested with..
> >
> > re0 at pci2 dev 0 function 0 "Realtek 8168" rev 0x03: RTL8168D/8111D
> > (0x2800)
> > re0 at pci2 dev 0 function 0 "Realtek 8168" rev 0x0c: RTL8168G/8111G
> > (0x4c00)
> >
> > OK?
>
> Fix a typo with RL_FLAG_HWIM.
So store the PCI id in the sc_product field instead. The CardBus bit is not
strictly necessary but I'd rather be consistent for both bus frontends for
now especially if I happen to use this field for anything else in the future.
Index: pci/if_re_pci.c
===================================================================
RCS file: /home/cvs/src/sys/dev/pci/if_re_pci.c,v
retrieving revision 1.41
diff -u -p -u -p -r1.41 if_re_pci.c
--- pci/if_re_pci.c 22 Jul 2014 13:12:11 -0000 1.41
+++ pci/if_re_pci.c 5 Sep 2014 18:20:49 -0000
@@ -197,6 +197,8 @@ re_pci_attach(struct device *parent, str
CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF);
}
+ sc->sc_product = PCI_PRODUCT(pa->pa_id);
+
/* Call bus-independent attach routine */
if (re_attach(sc, intrstr)) {
pci_intr_disestablish(pc, psc->sc_ih);
Index: cardbus/if_re_cardbus.c
===================================================================
RCS file: /home/cvs/src/sys/dev/cardbus/if_re_cardbus.c,v
retrieving revision 1.24
diff -u -p -u -p -r1.24 if_re_cardbus.c
--- cardbus/if_re_cardbus.c 11 Aug 2014 12:45:45 -0000 1.24
+++ cardbus/if_re_cardbus.c 5 Sep 2014 18:19:48 -0000
@@ -152,6 +152,8 @@ re_cardbus_attach(struct device *parent,
}
snprintf(intrstr, sizeof(intrstr), "irq %d", ca->ca_intrline);
+ sc->sc_product = PCI_PRODUCT(ca->ca_id);
+
/* Call bus-independent (common) attach routine */
if (re_attach(sc, intrstr)) {
cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
Index: ic/re.c
===================================================================
RCS file: /home/cvs/src/sys/dev/ic/re.c,v
retrieving revision 1.155
diff -u -p -u -p -r1.155 re.c
--- ic/re.c 22 Jul 2014 13:12:12 -0000 1.155
+++ ic/re.c 5 Sep 2014 18:26:19 -0000
@@ -144,6 +144,7 @@
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
#include <dev/ic/rtl81x9reg.h>
#include <dev/ic/revar.h>
@@ -578,7 +579,7 @@ re_iff(struct rl_softc *sc)
* parts. This means we have to write the hash pattern in reverse
* order for those devices.
*/
- if (sc->rl_flags & RL_FLAG_INVMAR) {
+ if (sc->rl_flags & RL_FLAG_PCIE) {
CSR_WRITE_4(sc, RL_MAR0, swap32(hashes[1]));
CSR_WRITE_4(sc, RL_MAR4, swap32(hashes[0]));
} else {
@@ -604,7 +605,7 @@ re_reset(struct rl_softc *sc)
if (i == RL_TIMEOUT)
printf("%s: reset never completed!\n", sc->sc_dev.dv_xname);
- if (sc->rl_flags & RL_FLAG_MACLDPS)
+ if (sc->rl_flags & RL_FLAG_MACRESET)
CSR_WRITE_1(sc, RL_LDPS, 1);
}
@@ -639,13 +640,14 @@ re_attach(struct rl_softc *sc, const cha
switch (sc->sc_hwrev) {
case RL_HWREV_8139CPLUS:
- sc->rl_flags |= RL_FLAG_NOJUMBO | RL_FLAG_AUTOPAD;
+ sc->rl_flags |= RL_FLAG_FASTETHER | RL_FLAG_AUTOPAD;
+ sc->rl_max_mtu = RL_MTU;
break;
case RL_HWREV_8100E:
case RL_HWREV_8100E_SPIN2:
case RL_HWREV_8101E:
- sc->rl_flags |= RL_FLAG_NOJUMBO | RL_FLAG_INVMAR |
- RL_FLAG_PHYWAKE;
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_FASTETHER;
+ sc->rl_max_mtu = RL_MTU;
break;
case RL_HWREV_8103E:
sc->rl_flags |= RL_FLAG_MACSLEEP;
@@ -653,70 +655,103 @@ re_attach(struct rl_softc *sc, const cha
case RL_HWREV_8102E:
case RL_HWREV_8102EL:
case RL_HWREV_8102EL_SPIN1:
- sc->rl_flags |= RL_FLAG_NOJUMBO | RL_FLAG_INVMAR |
- RL_FLAG_PHYWAKE | RL_FLAG_PAR | RL_FLAG_DESCV2 |
- RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD;
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
+ RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_FASTETHER |
+ RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD;
+ sc->rl_max_mtu = RL_MTU;
break;
case RL_HWREV_8401E:
- case RL_HWREV_8402:
case RL_HWREV_8105E:
case RL_HWREV_8105E_SPIN1:
case RL_HWREV_8106E:
- sc->rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
- RL_FLAG_PHYWAKE_PM | RL_FLAG_PAR | RL_FLAG_DESCV2 |
- RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD |
- RL_FLAG_NOJUMBO;
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PHYWAKE_PM |
+ RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
+ RL_FLAG_FASTETHER | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD;
+ sc->rl_max_mtu = RL_MTU;
+ break;
+ case RL_HWREV_8402:
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PHYWAKE_PM |
+ RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
+ RL_FLAG_FASTETHER | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD |
+ RL_FLAG_CMDSTOP_WAIT_TXQ;
+ sc->rl_max_mtu = RL_MTU;
break;
case RL_HWREV_8168B_SPIN1:
case RL_HWREV_8168B_SPIN2:
+ sc->rl_flags |= RL_FLAG_WOLRXENB;
+ /* FALLTHROUGH */
case RL_HWREV_8168B_SPIN3:
- sc->rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
- RL_FLAG_MACSTAT | RL_FLAG_HWIM;
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_MACSTAT;
+ sc->rl_max_mtu = RL_MTU;
break;
case RL_HWREV_8168C_SPIN2:
sc->rl_flags |= RL_FLAG_MACSLEEP;
/* FALLTHROUGH */
case RL_HWREV_8168C:
case RL_HWREV_8168CP:
- case RL_HWREV_8168DP:
- sc->rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
- RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
- RL_FLAG_HWIM | RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD;
- /*
- * These controllers support jumbo frame but it seems
- * that enabling it requires touching additional magic
- * registers. Depending on MAC revisions some
- * controllers need to disable checksum offload. So
- * disable jumbo frame until I have better idea what
- * it really requires to make it support.
- * RTL8168C/CP : supports up to 6KB jumbo frame.
- * RTL8111C/CP : supports up to 9KB jumbo frame.
- */
- sc->rl_flags |= RL_FLAG_NOJUMBO;
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
+ RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
+ RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 | RL_FLAG_WOL_MANLINK;
+ sc->rl_max_mtu = RL_JUMBO_MTU_6K;
break;
case RL_HWREV_8168D:
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PHYWAKE_PM |
+ RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
+ RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 |
+ RL_FLAG_WOL_MANLINK;
+ sc->rl_max_mtu = RL_JUMBO_MTU_9K;
+ break;
+ case RL_HWREV_8168DP:
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
+ RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_AUTOPAD |
+ RL_FLAG_JUMBOV2 | RL_FLAG_WAIT_TXPOLL | RL_FLAG_WOL_MANLINK;
+ sc->rl_max_mtu = RL_JUMBO_MTU_9K;
+ break;
case RL_HWREV_8168E:
- sc->rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
- RL_FLAG_PHYWAKE_PM | RL_FLAG_PAR | RL_FLAG_DESCV2 |
- RL_FLAG_MACSTAT | RL_FLAG_HWIM | RL_FLAG_CMDSTOP |
- RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO;
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PHYWAKE_PM |
+ RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
+ RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 |
+ RL_FLAG_WOL_MANLINK;
+ sc->rl_max_mtu = RL_JUMBO_MTU_9K;
break;
case RL_HWREV_8168E_VL:
+ sc->rl_flags |= RL_FLAG_EARLYOFF | RL_FLAG_PHYWAKE |
RL_FLAG_PAR |
+ RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
+ RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 |
RL_FLAG_CMDSTOP_WAIT_TXQ |
+ RL_FLAG_WOL_MANLINK;
+ sc->rl_max_mtu = RL_JUMBO_MTU_6K;
case RL_HWREV_8168F:
sc->rl_flags |= RL_FLAG_EARLYOFF;
/* FALLTHROUGH */
case RL_HWREV_8411:
- sc->rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
- RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
- RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO;
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
+ RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
+ RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 |
RL_FLAG_CMDSTOP_WAIT_TXQ |
+ RL_FLAG_WOL_MANLINK;
+ sc->rl_max_mtu = RL_JUMBO_MTU_9K;
break;
case RL_HWREV_8168EP:
case RL_HWREV_8168G:
case RL_HWREV_8411B:
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
+ RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
+ RL_FLAG_AUTOPAD | RL_FLAG_JUMBOV2 |
RL_FLAG_CMDSTOP_WAIT_TXQ |
+ RL_FLAG_WOL_MANLINK | RL_FLAG_EARLYOFFV2 |
RL_FLAG_RXDV_GATED;
+ sc->rl_max_mtu = RL_JUMBO_MTU_9K;
+ break;
case RL_HWREV_8168GU:
- sc->rl_flags |= RL_FLAG_INVMAR | RL_FLAG_PHYWAKE |
- RL_FLAG_PAR | RL_FLAG_DESCV2 | RL_FLAG_MACSTAT |
- RL_FLAG_CMDSTOP | RL_FLAG_AUTOPAD | RL_FLAG_NOJUMBO |
+ if (sc->sc_product == PCI_PRODUCT_REALTEK_RT8101E) {
+ /* RTL8106EUS */
+ sc->rl_flags |= RL_FLAG_FASTETHER;
+ sc->rl_max_mtu = RL_MTU;
+ } else {
+ sc->rl_flags |= RL_FLAG_JUMBOV2 | RL_FLAG_WOL_MANLINK;
+ sc->rl_max_mtu = RL_JUMBO_MTU_9K;
+ }
+
+ sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
+ RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP |
+ RL_FLAG_AUTOPAD | RL_FLAG_CMDSTOP_WAIT_TXQ |
RL_FLAG_EARLYOFFV2 | RL_FLAG_RXDV_GATED;
break;
case RL_HWREV_8169_8110SB:
@@ -728,7 +763,8 @@ re_attach(struct rl_softc *sc, const cha
case RL_HWREV_8169:
case RL_HWREV_8169S:
case RL_HWREV_8110S:
- sc->rl_flags |= RL_FLAG_MACLDPS;
+ sc->rl_flags |= RL_FLAG_MACRESET;
+ sc->rl_max_mtu = RL_JUMBO_MTU_7K;
break;
default:
break;
@@ -957,8 +993,8 @@ re_attach(struct rl_softc *sc, const cha
ifp->if_ioctl = re_ioctl;
ifp->if_start = re_start;
ifp->if_watchdog = re_watchdog;
- if ((sc->rl_flags & RL_FLAG_NOJUMBO) == 0)
- ifp->if_hardmtu = RL_JUMBO_MTU;
+ if ((sc->rl_flags & RL_FLAG_JUMBOV2) == 0)
+ ifp->if_hardmtu = sc->rl_max_mtu;
IFQ_SET_MAXLEN(&ifp->if_snd, RL_TX_QLEN);
IFQ_SET_READY(&ifp->if_snd);
Index: ic/rtl81x9reg.h
===================================================================
RCS file: /home/cvs/src/sys/dev/ic/rtl81x9reg.h,v
retrieving revision 1.85
diff -u -p -u -p -r1.85 rtl81x9reg.h
--- ic/rtl81x9reg.h 8 Jul 2014 05:35:18 -0000 1.85
+++ ic/rtl81x9reg.h 5 Sep 2014 18:17:26 -0000
@@ -736,7 +736,15 @@ struct rl_stats {
/* see comment in dev/ic/re.c */
#define RL_JUMBO_FRAMELEN 7440
-#define RL_JUMBO_MTU (RL_JUMBO_FRAMELEN-ETHER_HDR_LEN-ETHER_CRC_LEN)
+#define RL_JUMBO_MTU_4K \
+ ((4 * 1024) - ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN)
+#define RL_JUMBO_MTU_6K \
+ ((6 * 1024) - ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN)
+#define RL_JUMBO_MTU_7K \
+ (RL_JUMBO_FRAMELEN - ETHER_HDR_LEN - ETHER_CRC_LEN -
ETHER_VLAN_ENCAP_LEN)
+#define RL_JUMBO_MTU_9K \
+ ((9 * 1024) - ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN)
+#define RL_MTU ETHERMTU
#define MAX_NUM_MULTICAST_ADDRESSES 128
@@ -823,6 +831,8 @@ struct rl_softc {
struct mii_data sc_mii; /* MII information */
u_int8_t rl_type;
u_int32_t sc_hwrev;
+ pci_vendor_id_t sc_product;
+ int rl_max_mtu;
int rl_eecmd_read;
int rl_eewidth;
int rl_bus_speed;
@@ -841,23 +851,27 @@ struct rl_softc {
#define RL_FLAG_MSI 0x00000001
#define RL_FLAG_PCI64 0x00000002
#define RL_FLAG_PCIE 0x00000004
-#define RL_FLAG_INVMAR 0x00000008
-#define RL_FLAG_PHYWAKE 0x00000010
-#define RL_FLAG_NOJUMBO 0x00000020
-#define RL_FLAG_PAR 0x00000040
-#define RL_FLAG_DESCV2 0x00000080
-#define RL_FLAG_MACSTAT 0x00000100
-#define RL_FLAG_HWIM 0x00000200
-#define RL_FLAG_TIMERINTR 0x00000400
-#define RL_FLAG_MACLDPS 0x00000800
-#define RL_FLAG_CMDSTOP 0x00001000
-#define RL_FLAG_MACSLEEP 0x00002000
-#define RL_FLAG_AUTOPAD 0x00004000
-#define RL_FLAG_LINK 0x00008000
-#define RL_FLAG_PHYWAKE_PM 0x00010000
-#define RL_FLAG_EARLYOFF 0x00020000
-#define RL_FLAG_EARLYOFFV2 0x00040000
-#define RL_FLAG_RXDV_GATED 0x00080000
+#define RL_FLAG_PHYWAKE 0x00000008
+#define RL_FLAG_PAR 0x00000010
+#define RL_FLAG_DESCV2 0x00000020
+#define RL_FLAG_MACSTAT 0x00000040
+#define RL_FLAG_HWIM 0x00000080
+#define RL_FLAG_TIMERINTR 0x00000100
+#define RL_FLAG_MACRESET 0x00000200
+#define RL_FLAG_CMDSTOP 0x00000400
+#define RL_FLAG_MACSLEEP 0x00000800
+#define RL_FLAG_AUTOPAD 0x00001000
+#define RL_FLAG_LINK 0x00002000
+#define RL_FLAG_PHYWAKE_PM 0x00004000
+#define RL_FLAG_EARLYOFF 0x00008000
+#define RL_FLAG_EARLYOFFV2 0x00010000
+#define RL_FLAG_RXDV_GATED 0x00020000
+#define RL_FLAG_FASTETHER 0x00040000
+#define RL_FLAG_CMDSTOP_WAIT_TXQ 0x00080000
+#define RL_FLAG_JUMBOV2 0x00100000
+#define RL_FLAG_WOL_MANLINK 0x00200000
+#define RL_FLAG_WAIT_TXPOLL 0x00400000
+#define RL_FLAG_WOLRXENB 0x00800000
u_int16_t rl_intrs;
u_int16_t rl_tx_ack;
--
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