> On 5 Nov 2014, at 10:58, Ted Unangst <t...@tedunangst.com> wrote: > > On Wed, Nov 05, 2014 at 09:38, David Gwynne wrote: >> >>> On 30 Oct 2014, at 07:52, Ted Unangst <t...@tedunangst.com> wrote: >>> >>> On Wed, Oct 29, 2014 at 07:25, David Gwynne wrote: >>> >>> >>>> i dunno. im fine with either removing colouring altogether or setting it >>>> from something else completely. i just want a decision to be made cos >>>> right now ph_color isnt set, which is a bug. >>> >>> there. i fixed it. >> >> looks like we were both ignorant and wrong. mikeb@ points out this from >> the original slab paper: >> >> 4.1. Impact of Buffer Address Distribution on Cache >> Utilization >> >> The address distribution of mid-size buffers can >> affect the system’s overall cache utilization. In par- >> ticular, power-of-two allocators - where all buffers >> are 2 n bytes and are 2 n -byte aligned - are pes- >> simal.* Suppose, for example, that every inode >> (∼ 300 bytes) is assigned a 512-byte buffer, 512-byte >> aligned, and that only the first dozen fields of an >> inode (48 bytes) are frequently referenced. Then >> the majority of inode-related memory traffic will be >> at addresses between 0 and 47 modulo 512. Thus >> the cache lines near 512-byte boundaries will be >> heavily loaded while the rest lie fallow. In effect >> only 9% (48/512) of the cache will be usable by >> inodes. Fully-associative caches would not suffer >> this problem, but current hardware trends are toward >> simpler rather than more complex caches. > > except pool won't align a 300 byte inode on 512 byte boundaries.
im not sure thats the point of the example.
