Hello, This patch fixes a bug affecting certain 'BeagleBone Black' devices which prevents the onboard eMMC chip from initializing. It has been discussed previously but was misattributed to manufacturers bumping its size from 2GB -> 4GB:
http://marc.info/?l=openbsd-tech&m=141122894126274&w=2 Some Beaglebones (of any revision) are manufactured with Kingston eMMC chips while others are manufactured with Micron eMMC chips. The Micron ones fail during the card identification stage as the sdmmc driver currently does not assert its ability to handle sector-addressed cards. The Kingston ones don't. Quoting the JEDEC eMMC standard, page 44: "If there is no indication by a host to a memory that the host is capable of handling sector type of addressing the higher than 2GB of density of memory will change its state to Inactive (similarly to a sit- uation in which there is no common voltage range to work with)" Watch this occur with -DSDHC_DBUG & -DSDMMC_DEBUG: ommmc1: start cmd 1 arg=0x60000 data=0x0 dlen=0 flags=0x1030 proc="sdmmc1" ommmc1: wait_state 1 0 1f70000(state=1f70000<_CLEV>) ommmc1: cmd=0x1020000 blksize=0 blkcount=0 ommmc1: interrupt status=1<_CC> ommmc1: intr status 0x1 error 0 resp[0] 0x00ff8080 ommmc1: cmd 1 done (flags=0x1030 error=0) sdmmc1: can't send memory OCR ommmc1: software reset reg=0x1000000 sdmmc1: can't enable card sdmmc gives up configuring the card after 100 failed CMD1 commands. My patch starts asserting the MMC_OCR_SECTOR_MODE bit after 50 failed attempts. This fixes the bug on my BBB with Micron chip: ommmc1: start cmd 1 arg=0x40060000 data=0x0 dlen=0 flags=0x1030 proc="sdmmc1" ommmc1: wait_state 1 0 1f70000(state=1f70000<_CLEV>) ommmc1: cmd=0x1020000 blksize=0 blkcount=0 ommmc1: interrupt status=1<_CC> ommmc1: intr status 0x1 error 0 resp[0] 0xc0ff8080 ommmc1: cmd 1 done (flags=0x1030 error=0) ommmc1: start cmd 2 arg=0 data=0x0 dlen=0 flags=0x1630 proc="sdmmc1" The card goes on to be interpreted correctly in the SCSI midlayer: scsibus1 at sdmmc1: 2 targets, initiator 0 sd1 at scsibus1 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 0/direct fixed sd1: 3744MB, 512 bytes/sector, 7667712 sectors I have tried mounting, reading, & writing to it and everything seems to work. The sector size is already read from the CSD register & considered during accesses as to prevent misalign errors so no additional work is needed to support sector mode. Ian Index: sdmmc_mem.c =================================================================== RCS file: /cvs/src/sys/dev/sdmmc/sdmmc_mem.c,v retrieving revision 1.21 diff -u -p -r1.21 sdmmc_mem.c --- sdmmc_mem.c 22 Apr 2015 04:02:06 -0000 1.21 +++ sdmmc_mem.c 28 Aug 2015 05:32:37 -0000 @@ -521,6 +521,10 @@ sdmmc_mem_send_op_cond(struct sdmmc_soft cmd.c_arg = ocr; cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R3; + /* Set sector mode bit after 50 failures*/ + if(i > 50) { + cmd.c_arg |= MMC_OCR_SECTOR_MODE; + } if (ISSET(sc->sc_flags, SMF_SD_MODE)) { cmd.c_opcode = SD_APP_OP_COND; error = sdmmc_app_command(sc, &cmd); Index: sdmmcreg.h =================================================================== RCS file: /cvs/src/sys/dev/sdmmc/sdmmcreg.h,v retrieving revision 1.6 diff -u -p -r1.6 sdmmcreg.h --- sdmmcreg.h 23 Sep 2014 12:08:13 -0000 1.6 +++ sdmmcreg.h 28 Aug 2015 05:32:37 -0000 @@ -48,6 +48,7 @@ /* OCR bits */ #define MMC_OCR_MEM_READY (1<<31) /* memory power-up status bit */ +#define MMC_OCR_SECTOR_MODE (1<<30) /* Provided in argument following CMD1 */ #define MMC_OCR_3_5V_3_6V (1<<23) #define MMC_OCR_3_4V_3_5V (1<<22) #define MMC_OCR_3_3V_3_4V (1<<21)
