Hi, Uwe & I have revised my earlier sdmmc patch adding support for sector-mode bit setting on certain eMMC devices. Here were my tests confirming it works:
> On Tue, Oct 27, 2015 at 10:49 PM, ian kremlin <[email protected]> wrote: > > On Tue, Oct 27, 2015 at 9:26 PM, Uwe Stuehler <[email protected]> wrote: > >> Can someone verify that this still works? > > > > I will test this tomorrow on my micron BBB, Kingston BBB & Cubox i4Pro > > using an array of sd/sdhc cards. > > Here are my findings. I used a fresh tree grabbed an hour ago with only > Uwe's patch applied. > > * Micron BeagleBone Black (problematic eMMC chip that wants sector mode bit): > > ommmc0 at omap0 > sdmmc0 at ommmc0 > ommmc1 at omap0 > sdmmc1 at ommmc1 > ... > scsibus0 at sdmmc0: 2 targets, initiator 0 > sd0 at scsibus0 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd0: 7388MB, 512 bytes/sector, 15130624 sectors > scsibus1 at sdmmc1: 2 targets, initiator 0 > sd1 at scsibus1 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd1: 3744MB, 512 bytes/sector, 7667712 sectors > > Both the eMMC chip and peripheral SD initialize correctly. The > peripheral SD in this case was a 8GB MicroSD (SDHC). Let's try this > again with a normal 2GB SD card (via adapter) to make sure non-SDHC > cards aren't negatively affected: > > ommmc0 at omap0 > sdmmc0 at ommmc0 > ommmc1 at omap0 > sdmmc1 at ommmc1 > ... > sd0 at scsibus0 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd0: 3744MB, 512 bytes/sector, 7667712 sectors > scsibus1 at sdmmc0: 2 targets, initiator 0 > sd1 at scsibus1 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd1: 1867MB, 512 bytes/sector, 3823616 sectors > > Everyhing looks good. Finally a test with an SDXC card to > make sure we cover all the bases: > > ommmc0 at omap0 > sdmmc0 at ommmc0 > ommmc1 at omap0 > sdmmc1 at ommmc1 > ... > sd0 at scsibus0 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd0: 60906MB, 512 bytes/sector, 124735488 sectors > scsibus1 at sdmmc1: 2 targets, initiator 0 > sd1 at scsibus1 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd1: 3744MB, 512 bytes/sector, 7667712 sectors > > Looks good. Having all possible combinations work like this > suggests we have solved the initial problem, but now let's check > the BBB with the Kingston eMMC to make sure it doesn't cause any > problems. Providing the sector-mode bits to the Kingston eMMC will > cause it to fail during init. > > * Kingston BeagleBone Black (did not have eMMC issues before patch): > > ommmc0 at omap0 > sdmmc0 at ommmc0 > ommmc1 at omap0 > sdmmc1 at ommmc1 > ... > scsibus0 at sdmmc1: 2 targets, initiator 0 > sd0 at scsibus0 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd0: 3688MB, 512 bytes/sector, 7553024 sectors > scsibus1 at sdmmc0: 2 targets, initiator 0 > sd1 at scsibus1 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd1: 7388MB, 512 bytes/sector, 15130624 sectors > > Phew. Let's try the non-microSD, non-SDHC card now: > > ommmc0 at omap0 > sdmmc0 at ommmc0 > ommmc1 at omap0 > sdmmc1 at ommmc1 > ... > scsibus0 at sdmmc1: 2 targets, initiator 0 > sd0 at scsibus0 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd0: 3688MB, 512 bytes/sector, 7553024 sectors > scsibus1 at sdmmc0: 2 targets, initiator 0 > sd1 at scsibus1 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd1: 1867MB, 512 bytes/sector, 3823616 sectors > > Cool, finally the SDXC: > > ommmc0 at omap0 > sdmmc0 at ommmc0 > ommmc1 at omap0 > sdmmc1 at ommmc1 > ... > scsibus0 at sdmmc1: 2 targets, initiator 0 > sd0 at scsibus0 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd0: 3688MB, 512 bytes/sector, 7553024 sectors > scsibus1 at sdmmc0: 2 targets, initiator 0 > sd1 at scsibus1 targ 1 lun 0: <SD/MMC, Drive #01, > SCSI2 > 0/direct fixed > sd1: 60906MB, 512 bytes/sector, 124735488 sectors > > -- > > I think this shows that Uwe's patch will fix the error correctly. I wanted > to test with my Cubox i4Pro but it lacks an onboard eMMC chip & will > not be of any worth. Please let me know if there is any further testing > you would like to see. I would really, really love this patch to go in :) > > Ian And here is the patch: Index: sdmmc_mem.c =================================================================== RCS file: /cvs/src/sys/dev/sdmmc/sdmmc_mem.c,v retrieving revision 1.21 diff -u -p -r1.21 sdmmc_mem.c --- sdmmc_mem.c 22 Apr 2015 04:02:06 -0000 1.21 +++ sdmmc_mem.c 8 Nov 2015 10:23:55 -0000 @@ -525,6 +525,8 @@ sdmmc_mem_send_op_cond(struct sdmmc_soft cmd.c_opcode = SD_APP_OP_COND; error = sdmmc_app_command(sc, &cmd); } else { + cmd.c_arg &= ~MMC_OCR_ACCESS_MODE_MASK; + cmd.c_arg |= MMC_OCR_SECTOR_MODE; cmd.c_opcode = MMC_SEND_OP_COND; error = sdmmc_mmc_command(sc, &cmd); } Index: sdmmcreg.h =================================================================== RCS file: /cvs/src/sys/dev/sdmmc/sdmmcreg.h,v retrieving revision 1.6 diff -u -p -r1.6 sdmmcreg.h --- sdmmcreg.h 23 Sep 2014 12:08:13 -0000 1.6 +++ sdmmcreg.h 8 Nov 2015 10:23:55 -0000 @@ -48,6 +48,9 @@ /* OCR bits */ #define MMC_OCR_MEM_READY (1<<31) /* memory power-up status bit */ +#define MMC_OCR_ACCESS_MODE_MASK 0x60000000 /* bits 30:29 */ +#define MMC_OCR_SECTOR_MODE (1<<30) +#define MMC_OCR_BYTE_MODE (1<<29) #define MMC_OCR_3_5V_3_6V (1<<23) #define MMC_OCR_3_4V_3_5V (1<<22) #define MMC_OCR_3_3V_3_4V (1<<21) Ian
