This teachs the ddb disassembler on amd64 about the {rd,wr}{fs,gs}base
instructions. Well, almost: the actual instructions start with the F3
prefix (aka "repe") but adding another hook in the disassembler logic to
require that for these (and suppress the output) seems like overkill. If
and when we ever use these instructions** I'm willing to kive with reading
"repe wrfsbase" in ddb.
ok?
Philip
** my measurements on Haswell didn't see any perf benefit to the kernel
using them instead of the MSRs, so no diff to do that at this time.
Index: amd64/db_disasm.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/db_disasm.c,v
retrieving revision 1.15
diff -u -p -r1.15 db_disasm.c
--- amd64/db_disasm.c 24 Jun 2015 20:50:39 -0000 1.15
+++ amd64/db_disasm.c 3 Apr 2016 02:13:41 -0000
@@ -136,10 +136,10 @@ char * db_Grp8[] = {
};
struct inst db_Grp9[] = {
- { "fxsave", FALSE, NONE, op1(E), 0 },
- { "fxrstor", FALSE, NONE, op1(E), 0 },
- { "ldmxcsr", FALSE, NONE, op1(E), 0 },
- { "stmxcsr", FALSE, NONE, op1(E), 0 },
+ { "fxsave", FALSE, NONE, op2(MEx,1), "rdfsbase" },
+ { "fxrstor", FALSE, NONE, op2(MEx,1), "rdgsbase" },
+ { "ldmxcsr", FALSE, NONE, op2(MEx,1), "wrfsbase" },
+ { "stmxcsr", FALSE, NONE, op2(MEx,1), "wrgsbase" },
{ "xsave", FALSE, NONE, op1(E), 0 },
{ "xrstor", FALSE, NONE, op2(MEx,1), "lfence" },
{ "xsaveopt", FALSE, NONE, op2(MEx,1), "mfence" },
