> Date: Fri, 29 Apr 2016 13:59:50 +0200
> From: Martin Pieuchot <[email protected]>
>
> 3 architectures make the scheduler aware of secondary CPUs before they
> can really execute anything. This is bad because during the boot
> process threads will be put on their run queues. That means that on
> such architecture we are only able to boot because the first CPU can
> steal threads from the not-yet-running CPUs.
>
> So let's be coherent and remove the requirement of being able to
> steal threads to boot. ok?
Apart from a typo (see below) this works on sparc64. And it makes
some sense to me. However, this does mean that pegging processes to a
secondary CPU won't work until cpu_boot_secondary_cpus() has been
called.
> Index: amd64/amd64/cpu.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/amd64/amd64/cpu.c,v
> retrieving revision 1.96
> diff -u -p -r1.96 cpu.c
> --- amd64/amd64/cpu.c 17 Mar 2016 13:18:47 -0000 1.96
> +++ amd64/amd64/cpu.c 29 Apr 2016 11:43:05 -0000
> @@ -443,7 +443,6 @@ cpu_attach(struct device *parent, struct
> #if defined(MULTIPROCESSOR)
> cpu_intr_init(ci);
> gdt_alloc_cpu(ci);
> - sched_init_cpu(ci);
> cpu_start_secondary(ci);
> ncpus++;
> if (ci->ci_flags & CPUF_PRESENT) {
> @@ -571,6 +570,7 @@ cpu_boot_secondary_processors(void)
> continue;
> if (ci->ci_flags & (CPUF_BSP | CPUF_SP | CPUF_PRIMARY))
> continue;
> + sched_init_cpu(ci);
> ci->ci_randseed = (arc4random() & 0x7fffffff) + 1;
> cpu_boot_secondary(ci);
> }
> Index: i386/i386/cpu.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/i386/i386/cpu.c,v
> retrieving revision 1.74
> diff -u -p -r1.74 cpu.c
> --- i386/i386/cpu.c 17 Mar 2016 13:18:47 -0000 1.74
> +++ i386/i386/cpu.c 29 Apr 2016 11:43:56 -0000
> @@ -323,7 +323,6 @@ cpu_attach(struct device *parent, struct
> gdt_alloc_cpu(ci);
> ci->ci_flags |= CPUF_PRESENT | CPUF_AP;
> identifycpu(ci);
> - sched_init_cpu(ci);
> ci->ci_next = cpu_info_list->ci_next;
> cpu_info_list->ci_next = ci;
> ncpus++;
> @@ -500,6 +499,7 @@ cpu_boot_secondary_processors(void)
> continue;
> if (ci->ci_flags & (CPUF_BSP|CPUF_SP|CPUF_PRIMARY))
> continue;
> + sched_init_cpu(ci);
> ci->ci_randseed = (arc4random() & 0x7fffffff) + 1;
> cpu_boot_secondary(ci);
> }
> Index: sparc64/sparc64/cpu.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/sparc64/sparc64/cpu.c,v
> retrieving revision 1.63
> diff -u -p -r1.63 cpu.c
> --- sparc64/sparc64/cpu.c 16 Nov 2014 12:30:59 -0000 1.63
> +++ sparc64/sparc64/cpu.c 29 Apr 2016 11:44:29 -0000
> @@ -180,8 +180,6 @@ alloc_cpuinfo(struct mainbus_attach_args
> cpi->ci_self = cpi;
> cpi->ci_node = ma->ma_node;
>
> - sched_init_cpu(cpi);
> -
> /*
> * Finally, add itself to the list of active cpus.
> */
> @@ -701,6 +699,8 @@ cpu_boot_secondary_processors(void)
> for (ci = cpus; ci != NULL; ci = ci->ci_next) {
> if (ci->ci_upaid == cpu_myid())
> continue;
> +
> + sched_init_cpu(cpi);
s/cpi/ci/
> ci->ci_randseed = (arc4random() & 0x7fffffff) + 1;
>
> if (CPU_ISSUN4V)
>
>
