> Date: Tue, 9 Aug 2016 16:47:45 +0200
> From: Marcus Glocker <[email protected]>
>
> This diff fixes the serial console hang which I face on the sunxi CHIP
> board by fixing '/* XXX sc_initialize? */' in sxiuart_param() and align
> the sc_initialize/speed check same as com(4) does it.
>
> As long we don't have a replacement for sxiuart yet, ok to get this in?
Go for it.
> Index: sxiuart.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/armv7/sunxi/sxiuart.c,v
> retrieving revision 1.10
> diff -u -p -r1.10 sxiuart.c
> --- sxiuart.c 5 Aug 2016 19:00:25 -0000 1.10
> +++ sxiuart.c 9 Aug 2016 14:32:47 -0000
> @@ -377,29 +377,36 @@ sxiuart_param(struct tty *tp, struct ter
> bus_space_write_1(iot, ioh, SXIUART_MCR, sc->sc_mcr);
> }
>
> - if (ospeed != 0) { /* XXX sc_initialize? */
> - while (ISSET(tp->t_state, TS_BUSY)) {
> - ++sc->sc_halt;
> - error = ttysleep(tp, &tp->t_outq,
> - TTOPRI | PCATCH, "sxiuartprm", 0);
> - --sc->sc_halt;
> - if (error) {
> - sxiuart_start(tp);
> - return (error);
> + if (sc->sc_initialize || (tp->t_ispeed != t->c_ispeed)) {
> + sc->sc_initialize = 0;
> +
> + if (ospeed != 0) {
> + while (ISSET(tp->t_state, TS_BUSY)) {
> + ++sc->sc_halt;
> + error = ttysleep(tp, &tp->t_outq,
> + TTOPRI | PCATCH, "sxiuartprm", 0);
> + --sc->sc_halt;
> + if (error) {
> + sxiuart_start(tp);
> + return (error);
> + }
> }
> - }
> - bus_space_write_1(iot, ioh, SXIUART_LCR, lcr | LCR_DLAB);
> - ratediv = 13;
> - bus_space_write_1(iot, ioh, SXIUART_DLL, ratediv);
> - bus_space_write_1(iot, ioh, SXIUART_DLH, ratediv >> 8);
> - bus_space_write_1(iot, ioh, SXIUART_LCR, lcr);
> - SET(sc->sc_mcr, MCR_DTR);
> - bus_space_write_1(iot, ioh, SXIUART_MCR, sc->sc_mcr);
> +
> + bus_space_write_1(iot, ioh, SXIUART_LCR,
> + lcr | LCR_DLAB);
> + ratediv = 13;
> + bus_space_write_1(iot, ioh, SXIUART_DLL, ratediv);
> + bus_space_write_1(iot, ioh, SXIUART_DLH, ratediv >> 8);
> + bus_space_write_1(iot, ioh, SXIUART_LCR, lcr);
> + SET(sc->sc_mcr, MCR_DTR);
> + bus_space_write_1(iot, ioh, SXIUART_MCR, sc->sc_mcr);
> + } else
> + bus_space_write_1(iot, ioh, SXIUART_LCR, lcr);
> +
> + /* setup fifo */
> + bus_space_write_1(iot, ioh, SXIUART_FCR, FIFOE | FIFO_RXT0);
> } else
> bus_space_write_1(iot, ioh, SXIUART_LCR, lcr);
> -
> - /* setup fifo */
> - bus_space_write_1(iot, ioh, SXIUART_FCR, FIFOE | FIFO_RXT0);
>
> /* When not using CRTSCTS, RTS follows DTR. */
> if (!ISSET(t->c_cflag, CRTSCTS)) {
>
>
