On Sun, Aug 14, 2016 at 12:08:14AM +0200, Mark Kettenis wrote:
> > Date: Sat, 13 Aug 2016 23:06:45 +0200
> > From: Marcus Glocker <[email protected]>
> >
> > When I currently boot the allwinner,sun5i-r8 board with an UART cable
> > connected for console but no terminal attached, the boot hangs as soon
> > the driver switches from the console output routines to interrupts.
> >
> > I figured out that this is caused because at one place we set the
> > FIFO RX interupt trigger to RXT2 (trigger on 1/2 full) instead of RXT0
> > (trigger on 1 char). I guess it's a typo since everywhere else in the
> > driver it gets set to RXT0.
> >
> > When setting it to RXT0 (which is the reset value) the boot doesn't
> > hang anymore also when an UART cable is connected without a terminal
> > attached.
> >
> > ok?
>
> Not sure if it is a typo, but if it fixes your issues, go ahead.
Sigh. Doing further tests showed that the last diff didn't work
reliable. I did steal the FIFO drain code as well now from com(4) and
now it seems to work reliable. Still ok for you?
Index: sxiuart.c
===================================================================
RCS file: /cvs/src/sys/arch/armv7/sunxi/sxiuart.c,v
retrieving revision 1.12
diff -u -p -r1.12 sxiuart.c
--- sxiuart.c 12 Aug 2016 16:09:37 -0000 1.12
+++ sxiuart.c 14 Aug 2016 11:56:49 -0000
@@ -660,11 +660,18 @@ sxiuartopen(dev_t dev, int flag, int mod
iot = sc->sc_iot;
ioh = sc->sc_ioh;
- bus_space_write_1(iot, ioh, SXIUART_FCR, FIFOE | FIFO_RXT2);
- delay(100);
- while (ISSET(bus_space_read_1(iot, ioh, SXIUART_LSR),
- LSR_RXRDY))
+ /* (Re)enable and drain FIFOs. */
+ for (;;) {
+ bus_space_write_1(iot, ioh, SXIUART_FCR, 0);
+ delay(100);
(void)bus_space_read_1(iot, ioh, SXIUART_RBR);
+ bus_space_write_1(iot, ioh, SXIUART_FCR,
+ FIFOE | FIFO_RXT0);
+ delay(100);
+ if (!ISSET(bus_space_read_1(iot, ioh, SXIUART_LSR),
+ LSR_RXRDY))
+ break;
+ }
sc->sc_mcr = MCR_DTR | MCR_RTS | MCR_IENABLE;
bus_space_write_1(iot, ioh, SXIUART_MCR, sc->sc_mcr);
