Hi,

been running w/this on wandboard for some days building ports.
pm_cstate should go too, but it's another small diff.

-Artturi


diff --git a/sys/arch/arm/arm/cpuswitch7.S b/sys/arch/arm/arm/cpuswitch7.S
index 2eeecec..3196c8e 100644
--- a/sys/arch/arm/arm/cpuswitch7.S
+++ b/sys/arch/arm/arm/cpuswitch7.S
@@ -232,25 +232,6 @@ ENTRY(cpu_switchto)
        ldr     r10, [r8, #(PCB_PAGEDIR)]       /* r10 = old L1 */
        ldr     r11, [r9, #(PCB_PAGEDIR)]       /* r11 = new L1 */
 
-       ldr     r0, [r8, #(PCB_DACR)]           /* r0 = old DACR */
-       ldr     r1, [r9, #(PCB_DACR)]           /* r1 = new DACR */
-
-       teq     r10, r11                        /* Same L1? */
-       cmpeq   r0, r1                          /* Same DACR? */
-       beq     .Lcs_context_switched           /* yes! */
-
-       mov     r2, #DOMAIN_CLIENT
-       cmp     r1, r2, lsl #(PMAP_DOMAIN_KERNEL * 2) /* Sw to kernel thread? */
-       beq     .Lcs_cache_purge_skipped        /* Yup. Don't flush cache */
-
-       stmfd   sp!, {r0-r3}
-       ldr     r1, .Lcpufuncs
-       mov     lr, pc
-       ldr     pc, [r1, #CF_ICACHE_SYNC_ALL]
-       ldmfd   sp!, {r0-r3}
-
-.Lcs_cache_purge_skipped:
-       /* rem: r1 = new DACR */
        /* rem: r6 = new proc */
        /* rem: r9 = new PCB */
        /* rem: r10 = old L1 */
@@ -263,8 +244,6 @@ ENTRY(cpu_switchto)
         */
        IRQdisableALL
 
-       mcr     CP15_DACR(r1)           /* Update DACR for new context */
-
        cmp     r10, r11                /* Switching to the same L1? */
        ldr     r10, .Lcpufuncs
        beq     .Lcs_context_switched   /* Yup. */
diff --git a/sys/arch/arm/arm/genassym.cf b/sys/arch/arm/arm/genassym.cf
index 6322e93..517a393 100644
--- a/sys/arch/arm/arm/genassym.cf
+++ b/sys/arch/arm/arm/genassym.cf
@@ -86,7 +86,9 @@ member        pcb_tf
 member pcb_pagedir
 member pcb_pl1vec
 member pcb_l1vec
+ifndef CPU_ARMv7
 member pcb_dacr
+endif
 member pcb_cstate
 member pcb_flags
 member PCB_R8                  pcb_un.un_32.pcb32_r8
diff --git a/sys/arch/arm/arm/pmap7.c b/sys/arch/arm/arm/pmap7.c
index 402393c..d7e0e39 100644
--- a/sys/arch/arm/arm/pmap7.c
+++ b/sys/arch/arm/arm/pmap7.c
@@ -388,7 +388,7 @@ struct pv_entry *pmap_remove_pv(struct vm_page *, pmap_t, 
vaddr_t);
 u_int          pmap_modify_pv(struct vm_page *, pmap_t, vaddr_t,
                    u_int, u_int);
 
-void           pmap_alloc_l1(pmap_t, int);
+void           pmap_alloc_l1(pmap_t);
 void           pmap_free_l1(pmap_t);
 
 struct l2_bucket *pmap_get_l2_bucket(pmap_t, vaddr_t);
@@ -622,7 +622,7 @@ uint nl1;
  * This is called at pmap creation time.
  */
 void
-pmap_alloc_l1(pmap_t pm, int domain)
+pmap_alloc_l1(pmap_t pm)
 {
        struct l1_ttable *l1;
        struct pglist plist;
@@ -632,7 +632,7 @@ pmap_alloc_l1(pmap_t pm, int domain)
        int error;
 
 #ifdef PMAP_DEBUG
-printf("%s: %d %d\n", __func__, domain, ++nl1);
+printf("%s: %d\n", __func__, ++nl1);
 #endif
        /* XXX use a pool? or move to inside struct pmap? */
        l1 = malloc(sizeof(*l1), M_VMPMAP, M_WAITOK);
@@ -666,7 +666,6 @@ printf("%s: %d %d\n", __func__, domain, ++nl1);
        pmap_init_l1(l1, pl1pt);
 
        pm->pm_l1 = l1;
-       pm->pm_domain = domain;
 }
 
 /*
@@ -843,11 +842,10 @@ pmap_free_l2_bucket(pmap_t pm, struct l2_bucket *l2b, 
u_int count)
        pl1pd = &pm->pm_l1->l1_kva[l1idx];
 
        /*
-        * If the L1 slot matches the pmap's domain
-        * number, then invalidate it.
+        * If the L1 slot matches, then invalidate it.
         */
-       l1pd = *pl1pd & (L1_TYPE_MASK | L1_C_DOM_MASK);
-       if (l1pd == (L1_C_DOM(pm->pm_domain) | L1_TYPE_C)) {
+       l1pd = *pl1pd & L1_TYPE_MASK;
+       if (l1pd == L1_TYPE_C) {
                *pl1pd = L1_TYPE_INV;
                PTE_SYNC(pl1pd);
                pmap_tlb_flushID_SE(pm, l1idx << L1_S_SHIFT);
@@ -1071,7 +1069,7 @@ pmap_create(void)
 
        pm->pm_refs = 1;
        pm->pm_stats.wired_count = 0;
-       pmap_alloc_l1(pm, PMAP_DOMAIN_USER_V7);
+       pmap_alloc_l1(pm);
 
        return (pm);
 }
@@ -1270,14 +1268,12 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_t pa, vm_prot_t 
prot, int flags)
                        /*
                         * This mapping is likely to be accessed as
                         * soon as we return to userland. Fix up the
-                        * L1 entry to avoid taking another
-                        * page/domain fault.
+                        * L1 entry to avoid taking another page fault.
                         */
                        pd_entry_t *pl1pd, l1pd;
 
                        pl1pd = &pm->pm_l1->l1_kva[L1_IDX(va)];
-                       l1pd = l2b->l2b_phys | L1_C_DOM(pm->pm_domain) |
-                           L1_C_PROTO;
+                       l1pd = l2b->l2b_phys | L1_C_PROTO;
                        if (*pl1pd != l1pd) {
                                *pl1pd = l1pd;
                                PTE_SYNC(pl1pd);
@@ -1832,7 +1828,7 @@ printf("%s: va %08lx ftype %x %c pte %08x\n", __func__, 
va, ftype, user ? 'u' :
         * fix up the L1 if necessary.
         */
        pl1pd = &pm->pm_l1->l1_kva[l1idx];
-       l1pd = l2b->l2b_phys | L1_C_DOM(pm->pm_domain) | L1_C_PROTO;
+       l1pd = l2b->l2b_phys | L1_C_PROTO;
        if (*pl1pd != l1pd) {
                *pl1pd = l1pd;
                PTE_SYNC(pl1pd);
@@ -1923,20 +1919,17 @@ pmap_activate(struct proc *p)
        pmap_set_pcb_pagedir(pm, pcb);
 
        if (p == curproc) {
-               u_int cur_dacr, cur_ttb;
+               u_int cur_ttb;
 
                __asm volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
-               __asm volatile("mrc p15, 0, %0, c3, c0, 0" : "=r"(cur_dacr));
 
                cur_ttb &= ~(L1_TABLE_SIZE - 1);
 
-               if (cur_ttb == (u_int)pcb->pcb_pagedir &&
-                   cur_dacr == pcb->pcb_dacr) {
+               if (cur_ttb == (u_int)pcb->pcb_pagedir)
                        /*
                         * No need to switch address spaces.
                         */
                        return;
-               }
 
                s = splhigh();
                disable_interrupts(PSR_I | PSR_F);
@@ -1956,7 +1949,6 @@ pmap_activate(struct proc *p)
                         */
                }
 
-               cpu_domains(pcb->pcb_dacr);
                cpu_setttb(pcb->pcb_pagedir);
 
                enable_interrupts(PSR_I | PSR_F);
@@ -2247,8 +2239,7 @@ pmap_growkernel(vaddr_t maxkvaddr)
                /* Distribute new L1 entry to all other L1s */
                TAILQ_FOREACH(l1, &l1_list, l1_link) {
                        pl1pd = &l1->l1_kva[L1_IDX(pmap_curmaxkvaddr)];
-                       *pl1pd = l2b->l2b_phys | L1_C_DOM(PMAP_DOMAIN_KERNEL) |
-                           L1_C_PROTO;
+                       *pl1pd = l2b->l2b_phys | L1_C_PROTO;
                        PTE_SYNC(pl1pd);
                }
        }
@@ -2301,9 +2292,6 @@ pmap_set_pcb_pagedir(pmap_t pm, struct pcb *pcb)
 {
        KDASSERT(pm->pm_l1);
        pcb->pcb_pagedir = pm->pm_l1->l1_physaddr;
-       pcb->pcb_dacr = (DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) |
-           (DOMAIN_CLIENT << (pm->pm_domain * 2));
-
        pcb->pcb_pl1vec = NULL;
 }
 
@@ -2414,7 +2402,6 @@ pmap_bootstrap(pd_entry_t *kernel_l1pt, vaddr_t vstart, 
vaddr_t vend)
         * Initialise the kernel pmap object
         */
        pm->pm_l1 = l1;
-       pm->pm_domain = PMAP_DOMAIN_KERNEL;
        pm->pm_refs = 1;
 
        /*
@@ -2708,7 +2695,7 @@ pmap_map_section(vaddr_t l1pt, vaddr_t va, paddr_t pa, 
int prot, int cache)
        }
 
        pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa | L1_S_V7_AF |
-           L1_S_PROT(PTE_KERNEL, prot) | fl | L1_S_DOM(PMAP_DOMAIN_KERNEL);
+           L1_S_PROT(PTE_KERNEL, prot) | fl;
        PTE_SYNC(&pde[va >> L1_S_SHIFT]);
 }
 
@@ -2774,7 +2761,7 @@ pmap_link_l2pt(vaddr_t l1pt, vaddr_t va, pv_addr_t *l2pv)
        pd_entry_t *pde = (pd_entry_t *) l1pt, proto;
        u_int slot = va >> L1_S_SHIFT;
 
-       proto = L1_C_DOM(PMAP_DOMAIN_KERNEL) | L1_C_PROTO;
+       proto = L1_C_PROTO;
 
        pde[slot + 0] = proto | (l2pv->pv_pa + 0x000);
 #ifdef ARM32_NEW_VM_LAYOUT
@@ -2845,8 +2832,7 @@ pmap_map_chunk(vaddr_t l1pt, vaddr_t va, paddr_t pa, 
vsize_t size,
                        printf("S");
 #endif
                        pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa |
-                           L1_S_V7_AF | L1_S_PROT(PTE_KERNEL, prot) |
-                           f1 | L1_S_DOM(PMAP_DOMAIN_KERNEL);
+                           L1_S_V7_AF | L1_S_PROT(PTE_KERNEL, prot) | f1;
                        PTE_SYNC(&pde[va >> L1_S_SHIFT]);
                        va += L1_S_SIZE;
                        pa += L1_S_SIZE;
diff --git a/sys/arch/arm/include/pcb.h b/sys/arch/arm/include/pcb.h
index 8e0b06a..767f144 100644
--- a/sys/arch/arm/include/pcb.h
+++ b/sys/arch/arm/include/pcb.h
@@ -48,7 +48,9 @@ struct pcb_arm32 {
        paddr_t pcb32_pagedir;                  /* PT hooks */
        pd_entry_t *pcb32_pl1vec;               /* PTR to vector_base L1 entry*/
        pd_entry_t pcb32_l1vec;                 /* Value to stuff on ctx sw */
+#ifndef CPU_ARMv7
        u_int   pcb32_dacr;                     /* Domain Access Control Reg */
+#endif
        void    *pcb32_cstate;                  /* &pmap->pm_cstate */
        /*
         * WARNING!
diff --git a/sys/arch/arm/include/pmap.h b/sys/arch/arm/include/pmap.h
index dbe6099..9ac59cf 100644
--- a/sys/arch/arm/include/pmap.h
+++ b/sys/arch/arm/include/pmap.h
@@ -169,8 +169,10 @@ struct pmap_devmap {
  * The pmap structure itself
  */
 struct pmap {
+#ifndef CPU_ARMv7
        u_int8_t                pm_domain;
        boolean_t               pm_remove_all;
+#endif
        struct l1_ttable        *pm_l1;
        union pmap_cache_state  pm_cstate;
        u_int                   pm_refs;
diff --git a/sys/arch/armv7/armv7/armv7_machdep.c 
b/sys/arch/armv7/armv7/armv7_machdep.c
index 15b1195..2e2fafd 100644
--- a/sys/arch/armv7/armv7/armv7_machdep.c
+++ b/sys/arch/armv7/armv7/armv7_machdep.c
@@ -692,14 +692,9 @@ initarm(void *arg0, void *arg1, void *arg2)
         * tables.
         */
 
-       /* be a client to all domains */
-       cpu_domains(0x55555555);
        /* Switch tables */
-
-       cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
        setttb(kernel_l1pt.pv_pa);
        cpu_tlb_flushID();
-       cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
 
        /*
         * Moved from cpu_startup() as data_abort_handler() references
diff --git a/sys/arch/armv7/armv7/armv7_start.S 
b/sys/arch/armv7/armv7/armv7_start.S
index 628cda0..509e48a 100644
--- a/sys/arch/armv7/armv7/armv7_start.S
+++ b/sys/arch/armv7/armv7/armv7_start.S
@@ -150,8 +150,8 @@ _C_LABEL(bootstrap_start):
        mcr     CP15_TTBR0(r0)          /* Set TTB */
        mcr     CP15_TLBIALL(r0)        /* Flush TLB */
 
-       /* Set the Domain Access register.  Very important! */
-        mov     r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | 
DOMAIN_CLIENT)
+       /* Set the Domain Access register. */
+        mov     r0, #DOMAIN_CLIENT     /* we use only the first domain */
        mcr     CP15_DACR(r0)   
 
        /* Enable MMU */

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