Compiling sys/dev/athn.c fails with:
../../../../dev/ic/athn.c:2182:9: error: shifting a negative signed value is
undefined [-Werror,-Wshift-negative-value]
reg = RW(reg, AR_AES_MUTE_MASK1_FC1_MGMT,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../../../dev/ic/athnreg.h:1483:26: note: expanded from macro 'RW'
(((var) & ~field##_M) | SM(field, val))
^~~~~~~~~~~~~~
../../../../dev/ic/athnreg.h:1479:10: note: expanded from macro 'SM'
(((val) << field##_S) & field##_M)
~~~~~ ^
The whole statement is:
reg = RW(reg, AR_AES_MUTE_MASK1_FC1_MGMT,
~(IEEE80211_FC1_RETRY | IEEE80211_FC1_PWR_MGT |
IEEE80211_FC1_MORE_DATA));
and the issue is that the IEEE80211_FC1_XXX values are signed
integers, so the bitwise complement of that ends up being a negative
value. Possible the solution below. Alternative would be to define
te IEEE80211_FC1_XXX values as unsigned.
Thoughts?
Index: dev/ic/athnreg.h
===================================================================
RCS file: /cvs/src/sys/dev/ic/athnreg.h,v
retrieving revision 1.18
diff -u -p -r1.18 athnreg.h
--- dev/ic/athnreg.h 10 Jun 2012 21:23:36 -0000 1.18
+++ dev/ic/athnreg.h 24 Sep 2016 14:28:41 -0000
@@ -1472,11 +1472,11 @@
*/
/* Mask and Shift (getter). */
#define MS(val, field) \
- (((val) & field##_M) >> field##_S)
+ (((uint32_t)(val) & field##_M) >> field##_S)
/* Shift and Mask (setter). */
#define SM(field, val) \
- (((val) << field##_S) & field##_M)
+ (((uint32_t)(val) << field##_S) & field##_M)
/* Rewrite. */
#define RW(var, field, val) \
