(Reply to misc@ I presume.)
Hi Theo / list,
Some humble followup questions regarding the previous buffer cache
conversation. In particular curious what the crawl was that you saw in
the very large buffer cache test you made on Sparc64?
On 2016-07-12 00:16, Theo de Raadt wrote:
[...]
The buffer cache flipper was going to give us very large buffer cache
compared to other systems. Until it is finished, we are still doing
fine.
What do you mean by very large compared to other systems, do other OS:es
have any limit to it within their software architecture? Just to get the
idea.
[...]
I was simply pointing out that massive (well above 4GB) buffer cache
on a 64-bit DMA-reachable machine worked poorly. Likely due to data
structures managing the memory with rather large O...
(What did you mean by "O..."?)
On 2016-07-11 23:09, Theo de Raadt wrote:
[...]
And bufs don't need it either. Have you actually cranked your buffer
cache that high? I have test this, on sparc64 which has unlimited DMA
reach due to the iommu. The system comes to a crawl when there are
too many mbufs or bufs, probably due to management structures unable
to handle the pressure.
At what kind of sizes does it start to crawl, how is the crawling
experienced on the user level, why is the crawling / what kind of
pressure on management structures are we talking, how can it be
CPU-expensive?
(
On 2016-07-11 23:29, Theo de Raadt wrote:
[...]
BTW, my tests were on a 128GB sun4v machine. Sun T5140. They are
actually fairly cheap used these days.
Not sure how that affects the benchmarkas I not understand the
performance characteristics of the Sun T2 CPU,
http://johnjmclaughlin.blogspot.hk/2007/10/utrasparc-t2-server-benchmark-results.html
)
On 2016-07-12 00:07, Mark Kettenis wrote:
..
Except that the flipper isn't enabled yet and that the backpressure
mechanism is busted somewhow. At least that is what the recent
experiment with cranking up the buffer cache limit showed us. People
screamed and we backed the change out again. And there were problems
on amd64 and sparc64 alike.
What function does/would the backpressure mechanism serve do on Sparc64?
Also last and very much secondarily, if you have any guess on if ARM64
and Power8 would have 64bit DMA (and hence like Sparc64 no buffer cache
size limit) or not (and hence be like AMD64 with a 32bit buffer cache
size limit), that would be interesting to learn to know.
Thanks!
Tinker
