Diff below makes !IPL_MPSAFE interrupt handlers always grab the
KERNEL_LOCK() on amd64/i386/macppc.
Previously this was only the case if the IPL of the CPU before getting
the interrupt was lower than IPL_SCHED. This should always be the case
as IPI and CLOCK interrupts do not use the default interrupt handler on
MULTIPROCESSOR machines on these archs.
So this diff is basically a no-op for correctness suggested by
kettenis@.
ok?
Index: arch/amd64/amd64/intr.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/intr.c,v
retrieving revision 1.50
diff -u -p -r1.50 intr.c
--- arch/amd64/amd64/intr.c 14 Oct 2017 04:44:43 -0000 1.50
+++ arch/amd64/amd64/intr.c 16 Jan 2018 12:17:51 -0000
@@ -519,7 +519,7 @@ intr_handler(struct intrframe *frame, st
if (ih->ih_flags & IPL_MPSAFE)
need_lock = 0;
else
- need_lock = frame->if_ppl < IPL_SCHED;
+ need_lock = 1;
if (need_lock)
__mp_lock(&kernel_lock);
Index: arch/i386/i386/machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/i386/i386/machdep.c,v
retrieving revision 1.608
diff -u -p -r1.608 machdep.c
--- arch/i386/i386/machdep.c 30 Dec 2017 20:46:59 -0000 1.608
+++ arch/i386/i386/machdep.c 16 Jan 2018 12:15:18 -0000
@@ -3938,7 +3938,7 @@ intr_handler(struct intrframe *frame, st
if (ih->ih_flags & IPL_MPSAFE)
need_lock = 0;
else
- need_lock = frame->if_ppl < IPL_SCHED;
+ need_lock = 1;
if (need_lock)
__mp_lock(&kernel_lock);
Index: arch/macppc/dev/openpic.c
===================================================================
RCS file: /cvs/src/sys/arch/macppc/dev/openpic.c,v
retrieving revision 1.84
diff -u -p -r1.84 openpic.c
--- arch/macppc/dev/openpic.c 30 Apr 2017 16:45:45 -0000 1.84
+++ arch/macppc/dev/openpic.c 16 Jan 2018 12:18:25 -0000
@@ -99,7 +99,7 @@ void *openpic_intr_establish(void *, int
void openpic_intr_disestablish(void *, void *);
void openpic_collect_preconf_intr(void);
void openpic_ext_intr(void);
-int openpic_ext_intr_handler(struct intrhand *, int, int *);
+int openpic_ext_intr_handler(struct intrhand *, int *);
/* Generic IRQ management routines. */
void openpic_gen_acknowledge_irq(int, int);
@@ -658,7 +658,7 @@ openpic_ext_intr(void)
spurious = 1;
TAILQ_FOREACH(ih, &iq->iq_list, ih_list) {
ppc_intr_enable(1);
- ret = openpic_ext_intr_handler(ih, pcpl, &spurious);
+ ret = openpic_ext_intr_handler(ih, &spurious);
(void)ppc_intr_disable();
if (intr_shared_edge == 00 && ret == 1)
break;
@@ -679,7 +679,7 @@ openpic_ext_intr(void)
}
int
-openpic_ext_intr_handler(struct intrhand *ih, int pcpl, int *spurious)
+openpic_ext_intr_handler(struct intrhand *ih, int *spurious)
{
int ret;
#ifdef MULTIPROCESSOR
@@ -688,12 +688,11 @@ openpic_ext_intr_handler(struct intrhand
if (ih->ih_flags & IPL_MPSAFE)
need_lock = 0;
else
- need_lock = pcpl < IPL_SCHED;
+ need_lock = 1;
if (need_lock)
KERNEL_LOCK();
#endif
-
ret = (*ih->ih_fun)(ih->ih_arg);
if (ret) {
ih->ih_count.ec_count++;
