Now that clang is the default compiler on armv7 we can actually add
FPU/SIMD support to this architecture. In preparation this diff
changes "struct fpreg" to something a bit more sensible. Nether
FreeBSD nor NetBSD provides something sane (the ARM FPU history is
quite convoluted) so I went for something that follows the lead of
arm64. The layout is the same as the one used by the code written by
drahn@ and what's used by lldb. It contains 32 64-bit registers to
support VFPv4-D32 and Advanced SIMD and the FPSCR register.
This breaks GDB; the diff patches that up as well. Ports GDB will
need a similar diff. So I'm not moving ahead with this until I get an
ok from the relevant ports people.
ok?
Index: sys/arch/arm/include/reg.h
===================================================================
RCS file: /cvs/src/sys/arch/arm/include/reg.h,v
retrieving revision 1.2
diff -u -p -r1.2 reg.h
--- sys/arch/arm/include/reg.h 23 Mar 2011 16:54:34 -0000 1.2
+++ sys/arch/arm/include/reg.h 21 Jan 2018 14:06:25 -0000
@@ -37,8 +37,6 @@
#ifndef _ARM_REG_H_
#define _ARM_REG_H_
-#include <machine/fp.h>
-
struct reg {
unsigned int r[13];
unsigned int r_sp;
@@ -48,8 +46,8 @@ struct reg {
};
struct fpreg {
- unsigned int fpr_fpsr;
- fp_reg_t fpr[8];
+ uint64_t fp_reg[32];
+ uint32_t fp_scr;
};
#endif /* !_ARM_REG_H_ */
Index: gnu/usr.bin/binutils/gdb/armnbsd-nat.c
===================================================================
RCS file: /cvs/src/gnu/usr.bin/binutils/gdb/armnbsd-nat.c,v
retrieving revision 1.2
diff -u -p -r1.2 armnbsd-nat.c
--- gnu/usr.bin/binutils/gdb/armnbsd-nat.c 26 Nov 2005 14:28:57 -0000
1.2
+++ gnu/usr.bin/binutils/gdb/armnbsd-nat.c 21 Jan 2018 14:06:26 -0000
@@ -70,10 +70,10 @@ supply_fparegset (struct fpreg *fparegse
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
regcache_raw_supply (current_regcache, regno,
- (char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);
+ (char *) &fparegset->fp_reg[regno - ARM_F0_REGNUM]);
regcache_raw_supply (current_regcache, ARM_FPS_REGNUM,
- (char *) &fparegset->fpr_fpsr);
+ (char *) &fparegset->fp_scr);
}
static void
@@ -164,12 +164,12 @@ fetch_fp_register (int regno)
{
case ARM_FPS_REGNUM:
regcache_raw_supply (current_regcache, ARM_FPS_REGNUM,
- (char *) &inferior_fp_registers.fpr_fpsr);
+ (char *) &inferior_fp_registers.fp_scr);
break;
default:
regcache_raw_supply (current_regcache, regno,
- (char *) &inferior_fp_registers.fpr[regno -
ARM_F0_REGNUM]);
+ (char *) &inferior_fp_registers.fp_reg[regno -
ARM_F0_REGNUM]);
break;
}
}
@@ -352,12 +352,12 @@ store_fp_register (int regno)
{
case ARM_FPS_REGNUM:
regcache_raw_collect (current_regcache, ARM_FPS_REGNUM,
- (char *) &inferior_fp_registers.fpr_fpsr);
+ (char *) &inferior_fp_registers.fp_scr);
break;
default:
regcache_raw_collect (current_regcache, regno,
- (char *) &inferior_fp_registers.fpr[regno -
ARM_F0_REGNUM]);
+ (char *) &inferior_fp_registers.fp_reg[regno -
ARM_F0_REGNUM]);
break;
}
@@ -378,10 +378,10 @@ store_fp_regs (void)
for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
regcache_raw_collect (current_regcache, regno,
- (char *) &inferior_fp_registers.fpr[regno -
ARM_F0_REGNUM]);
+ (char *) &inferior_fp_registers.fp_reg[regno -
ARM_F0_REGNUM]);
regcache_raw_collect (current_regcache, ARM_FPS_REGNUM,
- (char *) &inferior_fp_registers.fpr_fpsr);
+ (char *) &inferior_fp_registers.fp_scr);
ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
