Diff below makes it possible to build and run a MULTIPROCESSOR kernel
on armv7.  It doesn't actually add any SMP support as there is no code
to spin up additional CPUs.  But it is a first step.

The diff is mostly a cleanup of machine/cpu.h that is very similar to
what I did to arm64.

ok?


Index: arch/arm/arm/arm32_machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/arm32_machdep.c,v
retrieving revision 1.55
diff -u -p -r1.55 arm32_machdep.c
--- arch/arm/arm/arm32_machdep.c        11 Dec 2017 05:27:40 -0000      1.55
+++ arch/arm/arm/arm32_machdep.c        5 Aug 2018 21:55:50 -0000
@@ -202,7 +202,7 @@ bootsync(int howto)
                 * did not come from a user process e.g. shutdown, but must
                 * have come from somewhere in the kernel.
                 */
-               IRQenable;
+               __set_cpsr_c(PSR_I, 0);
                printf("Warning IRQ's disabled during boot()\n");
        }
 
Index: arch/arm/arm/bcopy_page.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/bcopy_page.S,v
retrieving revision 1.2
diff -u -p -r1.2 bcopy_page.S
--- arch/arm/arm/bcopy_page.S   3 Jun 2018 18:58:11 -0000       1.2
+++ arch/arm/arm/bcopy_page.S   5 Aug 2018 21:55:50 -0000
@@ -40,9 +40,9 @@
  * Created      : 08/04/95
  */
 
-#include <machine/asm.h>
-
 #include "assym.h"
+
+#include <machine/asm.h>
 
 /* #define BIG_LOOPS */
 
Index: arch/arm/arm/bcopyinout.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/bcopyinout.S,v
retrieving revision 1.8
diff -u -p -r1.8 bcopyinout.S
--- arch/arm/arm/bcopyinout.S   3 Jun 2018 18:58:11 -0000       1.8
+++ arch/arm/arm/bcopyinout.S   5 Aug 2018 21:55:50 -0000
@@ -264,6 +264,35 @@ ENTRY(copyin)
        mov     pc, lr
 
 /*
+ * r0 = user space address
+ * r1 = kernel space address
+ * r2 = length
+ *
+ * Atomically copies a 32-bit word from user space to kernel space
+ *
+ * We save/restore r4-r11:
+ * r4-r11 are scratch
+ */
+ENTRY(copyin32)
+       SAVE_REGS
+
+       /* Get curcpu from TPIDRPRW. */
+       mrc     CP15_TPIDRPRW(r4)
+       ldr     r4, [r4, #CI_CURPCB]
+
+       ldr     r5, [r4, #PCB_ONFAULT]
+       adr     r3, .Lcopyfault
+       str     r3, [r4, #PCB_ONFAULT]
+
+       ldr     r6, [r0]
+       str     r6, [r1]
+
+       str     r5, [r4, #PCB_ONFAULT]
+       RESTORE_REGS
+
+       mov     pc, lr
+
+/*
  * r0 = kernel space address
  * r1 = user space address
  * r2 = length
@@ -273,7 +302,6 @@ ENTRY(copyin)
  * We save/restore r4-r11:
  * r4-r11 are scratch
  */
-
 ENTRY(copyout)
        /* Quick exit if length is zero */      
        teq     r2, #0
Index: arch/arm/arm/copystr.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/copystr.S,v
retrieving revision 1.8
diff -u -p -r1.8 copystr.S
--- arch/arm/arm/copystr.S      6 Jan 2017 00:06:02 -0000       1.8
+++ arch/arm/arm/copystr.S      5 Aug 2018 21:55:50 -0000
@@ -40,9 +40,11 @@
  */
 
 #include "assym.h"
+
+#include <sys/errno.h>
+       
 #include <machine/asm.h>
 #include <arm/sysreg.h>
-#include <sys/errno.h>
 
        .text
        .align  2
Index: arch/arm/arm/cpu.c
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/cpu.c,v
retrieving revision 1.46
diff -u -p -r1.46 cpu.c
--- arch/arm/arm/cpu.c  23 Feb 2018 19:08:56 -0000      1.46
+++ arch/arm/arm/cpu.c  5 Aug 2018 21:55:50 -0000
@@ -341,6 +341,12 @@ cpu_clockspeed(int *freq)
 }
 
 #ifdef MULTIPROCESSOR
+
+void
+cpu_boot_secondary_processors(void)
+{
+}
+
 int
 cpu_alloc_idle_pcb(struct cpu_info *ci)
 {
Index: arch/arm/arm/cpufunc_asm.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/cpufunc_asm.S,v
retrieving revision 1.5
diff -u -p -r1.5 cpufunc_asm.S
--- arch/arm/arm/cpufunc_asm.S  21 Sep 2016 11:33:05 -0000      1.5
+++ arch/arm/arm/cpufunc_asm.S  5 Aug 2018 21:55:50 -0000
@@ -42,7 +42,6 @@
  * Created      : 30/01/97
  */
  
-#include <machine/cpu.h>
 #include <machine/asm.h>
 #include <arm/sysreg.h>
 
Index: arch/arm/arm/cpufunc_asm_armv7.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/cpufunc_asm_armv7.S,v
retrieving revision 1.15
diff -u -p -r1.15 cpufunc_asm_armv7.S
--- arch/arm/arm/cpufunc_asm_armv7.S    15 Jan 2018 14:11:16 -0000      1.15
+++ arch/arm/arm/cpufunc_asm_armv7.S    5 Aug 2018 21:55:50 -0000
@@ -15,7 +15,6 @@
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-#include <machine/cpu.h>
 #include <machine/asm.h>
 #include <arm/armreg.h>
 #include <arm/sysreg.h>
Index: arch/arm/arm/cpuswitch7.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/cpuswitch7.S,v
retrieving revision 1.13
diff -u -p -r1.13 cpuswitch7.S
--- arch/arm/arm/cpuswitch7.S   24 Sep 2016 21:02:31 -0000      1.13
+++ arch/arm/arm/cpuswitch7.S   5 Aug 2018 21:55:50 -0000
@@ -79,10 +79,11 @@
  */
 
 #include "assym.h"
-#include <machine/cpu.h>
+
 #include <machine/frame.h>
 #include <machine/intr.h>
 #include <machine/asm.h>
+#include <arm/armreg.h>
 #include <arm/sysreg.h>
 
 /* LINTSTUB: include <sys/param.h> */
@@ -315,12 +316,12 @@ ENTRY(savectx)
        ldmfd   sp!, {r4-r7, pc}
 
 ENTRY(proc_trampoline)
-       mov     r0, #(IPL_NONE)
-       bl      _C_LABEL(_spllower)
-
 #ifdef MULTIPROCESSOR
        bl      _C_LABEL(proc_trampoline_mp)
 #endif
+       mov     r0, #(IPL_NONE)
+       bl      _C_LABEL(_spllower)
+
        mov     r0, r5
        mov     r1, sp
        mov     lr, pc
Index: arch/arm/arm/exception.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/exception.S,v
retrieving revision 1.8
diff -u -p -r1.8 exception.S
--- arch/arm/arm/exception.S    3 Jun 2018 18:58:11 -0000       1.8
+++ arch/arm/arm/exception.S    5 Aug 2018 21:55:50 -0000
@@ -46,10 +46,11 @@
  * Based on kate/display/abort.s
  */
 
+#include "assym.h"
+
 #include <machine/asm.h>
-#include <machine/cpu.h>
 #include <machine/frame.h>
-#include "assym.h"
+#include <arm/armreg.h>
 
        .text   
        .align  2
Index: arch/arm/arm/fault.c
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/fault.c,v
retrieving revision 1.35
diff -u -p -r1.35 fault.c
--- arch/arm/arm/fault.c        22 Jun 2018 18:50:42 -0000      1.35
+++ arch/arm/arm/fault.c        5 Aug 2018 21:55:50 -0000
@@ -340,7 +340,9 @@ data_abort_handler(trapframe_t *tf)
 
        onfault = pcb->pcb_onfault;
        pcb->pcb_onfault = NULL;
+       KERNEL_LOCK();
        error = uvm_fault(map, va, 0, ftype);
+       KERNEL_UNLOCK();
        pcb->pcb_onfault = onfault;
 
 #if 0
@@ -385,7 +387,9 @@ data_abort_handler(trapframe_t *tf)
        sd.trap = fsr;
 do_trapsignal:
        sv.sival_int = sd.addr;
+       KERNEL_LOCK();
        trapsignal(p, sd.signo, sd.trap, sd.code, sv);
+       KERNEL_UNLOCK();
 out:
        /* If returning to user mode, make sure to invoke userret() */
        if (user)
@@ -595,7 +599,9 @@ prefetch_abort_handler(trapframe_t *tf)
        }
 #endif
 
+       KERNEL_LOCK();
        error = uvm_fault(map, va, 0, PROT_READ | PROT_EXEC);
+       KERNEL_UNLOCK();
        if (__predict_true(error == 0))
                goto out;
 
@@ -604,9 +610,14 @@ prefetch_abort_handler(trapframe_t *tf)
                printf("UVM: pid %d (%s), uid %d killed: "
                    "out of swap\n", p->p_p->ps_pid, p->p_p->ps_comm,
                    p->p_ucred ? (int)p->p_ucred->cr_uid : -1);
+               KERNEL_LOCK();
                trapsignal(p, SIGKILL, 0, SEGV_MAPERR, sv);
-       } else
+               KERNEL_UNLOCK();
+       } else {
+               KERNEL_LOCK();
                trapsignal(p, SIGSEGV, 0, SEGV_MAPERR, sv);
+               KERNEL_UNLOCK();
+       }
 
 out:
        userret(p);
Index: arch/arm/arm/genassym.cf
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/genassym.cf,v
retrieving revision 1.16
diff -u -p -r1.16 genassym.cf
--- arch/arm/arm/genassym.cf    24 Sep 2016 21:02:31 -0000      1.16
+++ arch/arm/arm/genassym.cf    5 Aug 2018 21:55:50 -0000
@@ -60,7 +60,6 @@ ifdef __ARM_FIQ_INDIRECT
 define __ARM_FIQ_INDIRECT      1
 endif
 
-export DOMAIN_CLIENT
 export PMAP_DOMAIN_KERNEL
 
 ifdef PMAP_INCLUDE_PTE_SYNC
@@ -75,8 +74,7 @@ export        SONPROC
 
 struct proc
 member p_addr
-#member        p_priority
-#member        p_wchan
+member p_cpu
 member p_stat
 # XXX use PROC_SIZEOF in new code whenever possible
 define PROCSIZE                sizeof(struct proc)
Index: arch/arm/arm/in_cksum_arm.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/in_cksum_arm.S,v
retrieving revision 1.6
diff -u -p -r1.6 in_cksum_arm.S
--- arch/arm/arm/in_cksum_arm.S 3 Jun 2018 18:58:11 -0000       1.6
+++ arch/arm/arm/in_cksum_arm.S 5 Aug 2018 21:55:50 -0000
@@ -40,8 +40,9 @@
  * Hand-optimised in_cksum() and in4_cksum() implementations for ARM/Xscale
  */
 
-#include <machine/asm.h>
 #include "assym.h"
+
+#include <machine/asm.h>
 
 .syntax unified
 
Index: arch/arm/arm/irq_dispatch.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/irq_dispatch.S,v
retrieving revision 1.14
diff -u -p -r1.14 irq_dispatch.S
--- arch/arm/arm/irq_dispatch.S 26 Jan 2018 16:22:19 -0000      1.14
+++ arch/arm/arm/irq_dispatch.S 5 Aug 2018 21:55:50 -0000
@@ -71,8 +71,8 @@
 #include "assym.h"
 
 #include <machine/asm.h>
+#include <arm/armreg.h>
 #include <arm/sysreg.h>
-#include <machine/cpu.h>
 #include <machine/frame.h>
 #include <machine/intr.h>
 
Index: arch/arm/arm/locore.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/locore.S,v
retrieving revision 1.16
diff -u -p -r1.16 locore.S
--- arch/arm/arm/locore.S       30 Jun 2018 15:23:35 -0000      1.16
+++ arch/arm/arm/locore.S       5 Aug 2018 21:55:50 -0000
@@ -33,12 +33,14 @@
  */
 
 #include "assym.h"
+
 #include <sys/syscall.h>
 #include <sys/errno.h>
+
 #include <machine/asm.h>
-#include <arm/sysreg.h>
-#include <machine/cpu.h>
 #include <machine/frame.h>
+#include <arm/armreg.h>
+#include <arm/sysreg.h>
 
 /* What size should this really be ? It is only used by init_arm() */
 #define INIT_ARM_STACK_SIZE    2048
Index: arch/arm/arm/setstack.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/setstack.S,v
retrieving revision 1.4
diff -u -p -r1.4 setstack.S
--- arch/arm/arm/setstack.S     30 Jun 2018 15:23:35 -0000      1.4
+++ arch/arm/arm/setstack.S     5 Aug 2018 21:55:50 -0000
@@ -48,8 +48,8 @@
  * Based of kate/display/setstack.s
  */
 
-#include <machine/cpu.h>
 #include <machine/asm.h>
+#include <arm/armreg.h>
 
 /* To set the stack pointer for a particular mode we must switch
  * to that mode update the banked r13 and then switch back.
Index: arch/arm/arm/sigcode.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/sigcode.S,v
retrieving revision 1.6
diff -u -p -r1.6 sigcode.S
--- arch/arm/arm/sigcode.S      6 Feb 2018 09:25:54 -0000       1.6
+++ arch/arm/arm/sigcode.S      5 Aug 2018 21:55:50 -0000
@@ -32,10 +32,11 @@
  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <machine/asm.h>
-
 #include "assym.h"
+
 #include <sys/syscall.h>
+
+#include <machine/asm.h>
 
 /*
  * Signal trampoline; 
Index: arch/arm/arm/softintr.c
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/softintr.c,v
retrieving revision 1.8
diff -u -p -r1.8 softintr.c
--- arch/arm/arm/softintr.c     12 Jul 2014 18:44:41 -0000      1.8
+++ arch/arm/arm/softintr.c     5 Aug 2018 21:55:50 -0000
@@ -92,7 +92,9 @@ softintr_dispatch(int si)
                uvmexp.softs++;
                mtx_leave(&siq->siq_mtx);
 
+               KERNEL_LOCK();
                (*sih->sih_func)(sih->sih_arg);
+               KERNEL_UNLOCK();
        }
 }
 
Index: arch/arm/arm/undefined.c
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/undefined.c,v
retrieving revision 1.11
diff -u -p -r1.11 undefined.c
--- arch/arm/arm/undefined.c    26 Jan 2018 16:22:19 -0000      1.11
+++ arch/arm/arm/undefined.c    5 Aug 2018 21:55:50 -0000
@@ -113,7 +113,9 @@ gdb_trapper(u_int addr, u_int insn, stru
        if (insn == GDB_BREAKPOINT || insn == GDB5_BREAKPOINT) {
                if (code == FAULT_USER) {
                        sv.sival_int = addr;
+                       KERNEL_LOCK();
                        trapsignal(p, SIGTRAP, 0, TRAP_BRKPT, sv);
+                       KERNEL_UNLOCK();
                        return 0;
                }
        }
@@ -171,7 +173,9 @@ undefinedinstruction(trapframe_t *frame)
        if (__predict_false((fault_pc & 3) != 0)) {
                /* Give the user an illegal instruction signal. */
                sv.sival_int = (u_int32_t) fault_pc;
+               KERNEL_LOCK();
                trapsignal(p, SIGILL, 0, ILL_ILLOPC, sv);
+               KERNEL_UNLOCK();
                userret(p);
                return;
        }
@@ -255,7 +259,9 @@ undefinedinstruction(trapframe_t *frame)
                }
 
                sv.sival_int = frame->tf_pc;
+               KERNEL_LOCK();
                trapsignal(p, SIGILL, 0, ILL_ILLOPC, sv);
+               KERNEL_UNLOCK();
        }
 
        if ((fault_code & FAULT_USER) == 0)
Index: arch/arm/arm/vectors.S
===================================================================
RCS file: /cvs/src/sys/arch/arm/arm/vectors.S,v
retrieving revision 1.2
diff -u -p -r1.2 vectors.S
--- arch/arm/arm/vectors.S      21 Sep 2016 11:33:05 -0000      1.2
+++ arch/arm/arm/vectors.S      5 Aug 2018 21:55:50 -0000
@@ -33,6 +33,7 @@
  */
 
 #include "assym.h"
+
 #include <machine/asm.h>
 
 /*
Index: arch/arm/cortex/ampintc.c
===================================================================
RCS file: /cvs/src/sys/arch/arm/cortex/ampintc.c,v
retrieving revision 1.21
diff -u -p -r1.21 ampintc.c
--- arch/arm/cortex/ampintc.c   9 Jul 2018 09:51:43 -0000       1.21
+++ arch/arm/cortex/ampintc.c   5 Aug 2018 21:55:50 -0000
@@ -153,6 +153,7 @@ struct intrhand {
        int (*ih_func)(void *);         /* handler */
        void *ih_arg;                   /* arg for handler */
        int ih_ipl;                     /* IPL_* */
+       int ih_flags;
        int ih_irq;                     /* IRQ number */
        struct evcount  ih_count;
        char *ih_name;
@@ -540,6 +541,18 @@ ampintc_irq_handler(void *frame)
        pri = sc->sc_ampintc_handler[irq].iq_irq;
        s = ampintc_splraise(pri);
        TAILQ_FOREACH(ih, &sc->sc_ampintc_handler[irq].iq_list, ih_list) {
+#ifdef MULTIPROCESSOR
+               int need_lock;
+
+               if (ih->ih_flags & IPL_MPSAFE)
+                       need_lock = 0;
+               else
+                       need_lock = s < IPL_SCHED;
+
+               if (need_lock)
+                       KERNEL_LOCK();
+#endif
+
                if (ih->ih_arg != 0)
                        arg = ih->ih_arg;
                else
@@ -548,6 +561,10 @@ ampintc_irq_handler(void *frame)
                if (ih->ih_func(arg)) 
                        ih->ih_count.ec_count++;
 
+#ifdef MULTIPROCESSOR
+               if (need_lock)
+                       KERNEL_UNLOCK();
+#endif
        }
        ampintc_eoi(iack_val);
 
Index: arch/arm/include/cpu.h
===================================================================
RCS file: /cvs/src/sys/arch/arm/include/cpu.h,v
retrieving revision 1.51
diff -u -p -r1.51 cpu.h
--- arch/arm/include/cpu.h      30 Jun 2018 15:23:36 -0000      1.51
+++ arch/arm/include/cpu.h      5 Aug 2018 21:55:50 -0000
@@ -95,42 +95,12 @@
 #include <arm/cpuconf.h>
 
 #include <machine/intr.h>
-#ifndef _LOCORE
-#if 0
-#include <sys/user.h>
-#endif
 #include <machine/frame.h>
 #include <machine/pcb.h>
-#endif /* !_LOCORE */
-
 #include <arm/armreg.h>
 
-#ifndef _LOCORE
 /* 1 == use cpu_sleep(), 0 == don't */
 extern int cpu_do_powersave;
-#endif
-
-#ifdef _LOCORE
-#define IRQdisable \
-       stmfd   sp!, {r0} ; \
-       mrs     r0, cpsr ; \
-       orr     r0, r0, #(PSR_I) ; \
-       msr     cpsr_c, r0 ; \
-       ldmfd   sp!, {r0}
-
-#define IRQenable \
-       stmfd   sp!, {r0} ; \
-       mrs     r0, cpsr ; \
-       bic     r0, r0, #(PSR_I) ; \
-       msr     cpsr_c, r0 ; \
-       ldmfd   sp!, {r0}               
-
-#else
-#define IRQdisable __set_cpsr_c(PSR_I, PSR_I);
-#define IRQenable __set_cpsr_c(PSR_I, 0);
-#endif /* _LOCORE */
-
-#ifndef _LOCORE
 
 /* All the CLKF_* macros take a struct clockframe * as an argument. */
 
@@ -179,6 +149,7 @@ void        arm32_vector_init(vaddr_t, int);
 
 #include <sys/device.h>
 #include <sys/sched.h>
+
 struct cpu_info {
        struct device *ci_dev;          /* Device corresponding to this CPU */
        struct cpu_info *ci_next;
@@ -204,6 +175,10 @@ struct cpu_info {
        int     ci_mutex_level;
 #endif
 
+#ifdef MULTIPROCESSOR
+       struct srp_hazard       ci_srp_hazards[SRP_HAZARD_NUM];
+#endif
+
 #ifdef GPROF
        struct gmonparam *ci_gmon;
 #endif
@@ -211,9 +186,6 @@ struct cpu_info {
        void (*ci_flush_bp)(void);
 };
 
-extern struct cpu_info cpu_info_primary;
-extern struct cpu_info *cpu_info_list;
-
 static inline struct cpu_info *
 curcpu(void)
 {
@@ -222,6 +194,9 @@ curcpu(void)
        return (__ci);
 }
 
+extern struct cpu_info cpu_info_primary;
+extern struct cpu_info *cpu_info_list;
+
 #ifndef MULTIPROCESSOR
 #define cpu_number()   0
 #define CPU_IS_PRIMARY(ci)     1
@@ -306,8 +281,27 @@ void swi_handler   (trapframe_t *);
 /* machine_machdep.c */
 void board_startup(void);
 
-#endif /* !_LOCORE */
+static inline u_long
+intr_disable(void)
+{
+       uint32_t cpsr;
+
+       __asm volatile ("mrs %0, cpsr" : "=r"(cpsr));
+       __asm volatile ("msr cpsr_c, %0" :: "r"(cpsr | PSR_I));
+
+       return cpsr;
+}
+
+static inline void
+intr_restore(u_long cpsr)
+{
+       __asm volatile ("msr cpsr_c, %0" :: "r"(cpsr));
+}
 
 #endif /* _KERNEL */
+
+#ifdef MULTIPROCESSOR
+#include <sys/mplock.h>
+#endif /* MULTIPROCESSOR */
 
 #endif /* !_ARM_CPU_H_ */
Index: arch/arm/include/mplock.h
===================================================================
RCS file: arch/arm/include/mplock.h
diff -N arch/arm/include/mplock.h
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ arch/arm/include/mplock.h   5 Aug 2018 21:55:50 -0000
@@ -0,0 +1,10 @@
+/*     $OpenBSD$       */
+
+/* public domain */
+
+#ifndef _MACHINE_MPLOCK_H_
+#define _MACHINE_MPLOCK_H_
+
+#define __USE_MI_MPLOCK
+
+#endif /* !_MACHINE_MPLOCK_H */
Index: arch/armv7/armv7/armv7_machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/armv7/armv7/armv7_machdep.c,v
retrieving revision 1.54
diff -u -p -r1.54 armv7_machdep.c
--- arch/armv7/armv7/armv7_machdep.c    31 May 2018 09:12:59 -0000      1.54
+++ arch/armv7/armv7/armv7_machdep.c    5 Aug 2018 21:55:50 -0000
@@ -256,7 +256,7 @@ haltsys:
        config_suspend_all(DVACT_POWERDOWN);
 
        /* Make sure IRQ's are disabled */
-       IRQdisable;
+       intr_disable();
 
        if ((howto & RB_HALT) != 0) {
                if ((howto & RB_POWERDOWN) != 0) {
Index: arch/armv7/armv7/armv7_start.S
===================================================================
RCS file: /cvs/src/sys/arch/armv7/armv7/armv7_start.S,v
retrieving revision 1.15
diff -u -p -r1.15 armv7_start.S
--- arch/armv7/armv7/armv7_start.S      26 Oct 2017 02:48:36 -0000      1.15
+++ arch/armv7/armv7/armv7_start.S      5 Aug 2018 21:55:50 -0000
@@ -30,13 +30,12 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include "assym.h"
+
 #include <machine/asm.h>
 #include <arm/sysreg.h>
 #include <arm/armreg.h>
 #include <arm/pte.h>
-
-#undef DOMAIN_CLIENT   /* XXX */
-#include "assym.h"
 
 #ifdef __clang__
 .arch_extension sec
Index: arch/armv7/armv7/locore0.S
===================================================================
RCS file: /cvs/src/sys/arch/armv7/armv7/locore0.S,v
retrieving revision 1.4
diff -u -p -r1.4 locore0.S
--- arch/armv7/armv7/locore0.S  20 Jan 2018 23:57:44 -0000      1.4
+++ arch/armv7/armv7/locore0.S  5 Aug 2018 21:55:50 -0000
@@ -30,13 +30,12 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include "assym.h"
+
 #include <machine/asm.h>
 #include <arm/sysreg.h>
 #include <arm/armreg.h>
 #include <arm/pte.h>
-
-#undef DOMAIN_CLIENT   /* XXX */
-#include "assym.h"
 
 #ifdef __clang__
 .arch_extension virt
Index: arch/armv7/include/mplock.h
===================================================================
RCS file: arch/armv7/include/mplock.h
diff -N arch/armv7/include/mplock.h
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ arch/armv7/include/mplock.h 5 Aug 2018 21:55:50 -0000
@@ -0,0 +1,3 @@
+/*     $OpenBSD$       */
+
+#include <arm/mplock.h>

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