Diff below reduces the number of arm64 CPUs we attach to the maximum
that we support. Without this diff a kernel running on hardware with
more than MAXCPUS CPUs will almost certainly crash.
To make this work, the code is changed to bump ncpus whenever we
attach a secondary CPU instead of bumping it when those cores are
sucessfully spun up. Should make no difference on correctly
functioning hardware.
ok?
Index: arch/arm64/arm64/cpu.c
===================================================================
RCS file: /cvs/src/sys/arch/arm64/arm64/cpu.c,v
retrieving revision 1.22
diff -u -p -r1.22 cpu.c
--- arch/arm64/arm64/cpu.c 4 Aug 2018 11:55:40 -0000 1.22
+++ arch/arm64/arm64/cpu.c 17 Aug 2018 17:50:09 -0000
@@ -211,10 +211,14 @@ int
cpu_match(struct device *parent, void *cfdata, void *aux)
{
struct fdt_attach_args *faa = aux;
+ uint64_t mpidr = READ_SPECIALREG(mpidr_el1);
char buf[32];
- if (OF_getprop(faa->fa_node, "device_type", buf, sizeof(buf)) > 0 &&
- strcmp(buf, "cpu") == 0)
+ if (OF_getprop(faa->fa_node, "device_type", buf, sizeof(buf)) <= 0 ||
+ strcmp(buf, "cpu") != 0)
+ return 0;
+
+ if (ncpus < MAXCPUS || faa->fa_reg[0].addr == (mpidr & MPIDR_AFF))
return 1;
return 0;
@@ -243,6 +247,7 @@ cpu_attach(struct device *parent, struct
ci->ci_next = cpu_info_list->ci_next;
cpu_info_list->ci_next = ci;
ci->ci_flags |= CPUF_AP;
+ ncpus++;
}
#endif
@@ -429,7 +434,6 @@ cpu_start_secondary(struct cpu_info *ci)
uint64_t tcr;
int s;
- ncpus++;
ci->ci_flags |= CPUF_PRESENT;
__asm volatile("dsb sy");
