‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐ On Friday, October 19, 2018 5:15 PM, Mark Kettenis <[email protected]> wrote:
> > Date: Fri, 19 Oct 2018 10:22:30 +1000 > > From: David Gwynne [email protected] > > On Wed, May 10, 2017 at 10:09:59PM +1000, David Gwynne wrote: > > > > > On Mon, May 08, 2017 at 11:03:58AM +1000, David Gwynne wrote: > > > > > > > on modern sparc64s (think fire or sparc enterprise Mx000 boxes), > > > > setting up and tearing down the translation table entries (TTEs) > > > > is very expensive. so expensive that the cost of doing it for disk > > > > io has a noticable impact on compile times. > > > > now that there's a BUS_DMA_64BIT flag, we can use that to decide > > > > to bypass the iommu for devices that set that flag, therefore > > > > avoiding the cost of handling the TTEs. Question for the unintroduced, what's the scope here, TTE is Sparc's page table and reconfiguring them at (process) context switch is expensive and this suggestion removes the need for TTE:s for hardware device access, but those don't change at context switch?
