In practice, how many ticks will we poll for this device to be ready?
Does it vary by parent device, e.g. pci vs isapnp vs pcmcia?
If it's usually 1 we could try to poll at a faster rate, say 1ms or
5ms. If it's usually 2 or more we can leave it at 10ms, the effective
rate on 100hz platforms.
Thoughts? ok?
Index: ic/an.c
===================================================================
RCS file: /cvs/src/sys/dev/ic/an.c,v
retrieving revision 1.75
diff -u -p -r1.75 an.c
--- ic/an.c 7 Nov 2019 12:56:34 -0000 1.75
+++ ic/an.c 16 Jan 2020 16:47:08 -0000
@@ -681,10 +681,10 @@ an_wait(struct an_softc *sc)
int i;
CSR_WRITE_2(sc, AN_COMMAND, AN_CMD_NOOP2);
- for (i = 0; i < 3*hz; i++) {
+ for (i = 0; i < 300; i++) {
if (CSR_READ_2(sc, AN_EVENT_STAT) & AN_EV_CMD)
break;
- (void)tsleep(sc, PWAIT, "anatch", 1);
+ tsleep_nsec(sc, PWAIT, "anatch", MSEC_TO_NSEC(10));
}
CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_CMD);
}
