On 20.1.2020. 16:42, Martin Pieuchot wrote: > Diff below is a refactoring of the actual em(4) code and defines that > will allows me to present a shorter diff to interrupt multiple CPUs and > make use of multiple queues. > > It contains the following items: > > - Abstract the allocation/freeing of TX/RX ring into em_dma_malloc(). > This will ease the introduction of multiple rings. > > - Split the 82576 variant out of 82575. The distinction is necessary > when it comes to setting multiple queues. > > - Change multiple TX/RX related macro to take an index argument > corresponding to a ring. Currently only the index 0 and 1 are used. > > - Gather and print more stats counters > > - Switch to using a function, like FreeBSD, to translate 82542 > registers and get rid of a set of defines. > > It has been tested one the models below, I'd like to be sure there isn't > any fallout with this part before continuing the effort. > > em0 at pci0 dev 25 function 0 "Intel 82577LM" rev 0x06: msi > em0 at pci0 dev 25 function 0 "Intel 82579LM" rev 0x04: msi > em0 at pci0 dev 25 function 0 "Intel I218-V" rev 0x03: msi > em0 at pci0 dev 25 function 0 Intel I218-LM rev 0x04: msi > em0 at pci0 dev 31 function 6 "Intel I219-V" rev 0x21: msi
Hi, i tested this diff on em0 at pci7 dev 0 function 0 "Intel I350" rev 0x01: msi em1 at pci7 dev 0 function 1 "Intel I350" rev 0x01: msi with lots of ifconfig em up/down and sh netstart and box seems stable
